1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -global-isel -o - \ 3; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s 4 5define float @float_add(float %a, float %b) { 6; CHECK-LABEL: float_add: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: xsaddsp f1, f1, f2 9; CHECK-NEXT: blr 10entry: 11 %add = fadd float %a, %b 12 ret float %add 13} 14 15define double @double_add(double %a, double %b) { 16; CHECK-LABEL: double_add: 17; CHECK: # %bb.0: # %entry 18; CHECK-NEXT: xsadddp f1, f1, f2 19; CHECK-NEXT: blr 20entry: 21 %add = fadd double %a, %b 22 ret double %add 23} 24 25define float @float_sub(float %a, float %b) { 26; CHECK-LABEL: float_sub: 27; CHECK: # %bb.0: # %entry 28; CHECK-NEXT: xssubsp f1, f1, f2 29; CHECK-NEXT: blr 30entry: 31 %sub = fsub float %a, %b 32 ret float %sub 33} 34 35define float @float_mul(float %a, float %b) { 36; CHECK-LABEL: float_mul: 37; CHECK: # %bb.0: # %entry 38; CHECK-NEXT: xsmulsp f1, f1, f2 39; CHECK-NEXT: blr 40entry: 41 %mul = fmul float %a, %b 42 ret float %mul 43} 44 45define float @float_div(float %a, float %b) { 46; CHECK-LABEL: float_div: 47; CHECK: # %bb.0: # %entry 48; CHECK-NEXT: xsdivsp f1, f1, f2 49; CHECK-NEXT: blr 50entry: 51 %div = fdiv float %a, %b 52 ret float %div 53} 54 55define <4 x float> @test_fadd_v4f32(<4 x float> %a, <4 x float> %b) { 56; CHECK-LABEL: test_fadd_v4f32: 57; CHECK: # %bb.0: 58; CHECK-NEXT: xvaddsp v2, v2, v3 59; CHECK-NEXT: blr 60 %res = fadd <4 x float> %a, %b 61 ret <4 x float> %res 62} 63 64define <2 x double> @test_fadd_v2f64(<2 x double> %a, <2 x double> %b) { 65; CHECK-LABEL: test_fadd_v2f64: 66; CHECK: # %bb.0: 67; CHECK-NEXT: xvadddp v2, v2, v3 68; CHECK-NEXT: blr 69 %res = fadd <2 x double> %a, %b 70 ret <2 x double> %res 71} 72 73define <4 x float> @test_fsub_v4f32(<4 x float> %a, <4 x float> %b) { 74; CHECK-LABEL: test_fsub_v4f32: 75; CHECK: # %bb.0: 76; CHECK-NEXT: xvsubsp v2, v2, v3 77; CHECK-NEXT: blr 78 %res = fsub <4 x float> %a, %b 79 ret <4 x float> %res 80} 81 82define <2 x double> @test_fsub_v2f64(<2 x double> %a, <2 x double> %b) { 83; CHECK-LABEL: test_fsub_v2f64: 84; CHECK: # %bb.0: 85; CHECK-NEXT: xvsubdp v2, v2, v3 86; CHECK-NEXT: blr 87 %res = fsub <2 x double> %a, %b 88 ret <2 x double> %res 89} 90 91define <4 x float> @test_fmul_v4f32(<4 x float> %a, <4 x float> %b) { 92; CHECK-LABEL: test_fmul_v4f32: 93; CHECK: # %bb.0: 94; CHECK-NEXT: xvmulsp v2, v2, v3 95; CHECK-NEXT: blr 96 %res = fmul <4 x float> %a, %b 97 ret <4 x float> %res 98} 99 100define <2 x double> @test_fmul_v2f64(<2 x double> %a, <2 x double> %b) { 101; CHECK-LABEL: test_fmul_v2f64: 102; CHECK: # %bb.0: 103; CHECK-NEXT: xvmuldp v2, v2, v3 104; CHECK-NEXT: blr 105 %res = fmul <2 x double> %a, %b 106 ret <2 x double> %res 107} 108 109define <4 x float> @test_fdiv_v4f32(<4 x float> %a, <4 x float> %b) { 110; CHECK-LABEL: test_fdiv_v4f32: 111; CHECK: # %bb.0: 112; CHECK-NEXT: xvdivsp v2, v2, v3 113; CHECK-NEXT: blr 114 %res = fdiv <4 x float> %a, %b 115 ret <4 x float> %res 116} 117 118define <2 x double> @test_fdiv_v2f64(<2 x double> %a, <2 x double> %b) { 119; CHECK-LABEL: test_fdiv_v2f64: 120; CHECK: # %bb.0: 121; CHECK-NEXT: xvdivdp v2, v2, v3 122; CHECK-NEXT: blr 123 %res = fdiv <2 x double> %a, %b 124 ret <2 x double> %res 125} 126