xref: /llvm-project/llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll (revision 932d9c13faa3de1deca3874d3b864901aa5ec9a5)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
3
4target triple = "nvptx64-unknown-unknown"
5
6define void @kernel_func(ptr %in.vec, ptr %out.vec0) nounwind {
7; CHECK-LABEL: kernel_func(
8; CHECK:       {
9; CHECK-NEXT:    .reg .b32 %r<14>;
10; CHECK-EMPTY:
11; CHECK-NEXT:  // %bb.0:
12; CHECK-NEXT:    ld.param.u32 %r1, [kernel_func_param_0];
13; CHECK-NEXT:    ld.v4.b32 {%r2, %r3, %r4, %r5}, [%r1];
14; CHECK-NEXT:    ld.v4.b32 {%r6, %r7, %r8, %r9}, [%r1+16];
15; CHECK-NEXT:    ld.param.u32 %r10, [kernel_func_param_1];
16; CHECK-NEXT:    prmt.b32 %r11, %r6, %r8, 0x4000U;
17; CHECK-NEXT:    prmt.b32 %r12, %r2, %r4, 0x40U;
18; CHECK-NEXT:    prmt.b32 %r13, %r12, %r11, 0x7610U;
19; CHECK-NEXT:    st.u32 [%r10], %r13;
20; CHECK-NEXT:    ret;
21  %wide.vec = load <32 x i8>, ptr %in.vec, align 64
22  %vec0 = shufflevector <32 x i8> %wide.vec, <32 x i8> undef, <4 x i32> <i32 0, i32 8, i32 16, i32 24>
23  store <4 x i8> %vec0, ptr %out.vec0, align 64
24  ret void
25}
26