1; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler \ 2; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC32 3; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler \ 4; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC64 5 6; RUN: llc -mtriple=mipsel-- -mattr=+micromips -disable-mips-delay-filler \ 7; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=MM 8 9@t1 = dso_preemptable thread_local global i32 0, align 4 10 11define dso_preemptable i32 @f1() nounwind { 12entry: 13 %tmp = load i32, ptr @t1, align 4 14 ret i32 %tmp 15 16; PIC32-LABEL: f1: 17; PIC32-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 18; PIC32-DAG: addiu $4, $[[R0]], %tlsgd(t1) 19; PIC32-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 20; PIC32-DAG: jalr $25 21; PIC32-DAG: lw $2, 0($2) 22 23; PIC64-LABEL: f1: 24; PIC64-DAG: daddiu $[[R0:[a-z0-9]+]], $1, %lo(%neg(%gp_rel(f1))) 25; PIC64-DAG: daddiu $4, $[[R0]], %tlsgd(t1) 26; PIC64-DAG: ld $25, %call16(__tls_get_addr)($[[R0]]) 27; PIC64-DAG: jalr $25 28; PIC64-DAG: lw $2, 0($2) 29 30; MM-LABEL: f1: 31; MM-DAG: addu $gp, $2, $25 32; MM-DAG: addiu $4, $gp, %tlsgd(t1) 33; MM-DAG: lw $25, %call16(__tls_get_addr)($gp) 34; MM-DAG: jalr $25 35; MM-DAG: lw16 $2, 0($2) 36} 37 38@t2 = external thread_local global i32 39 40define dso_preemptable i32 @f2() nounwind { 41entry: 42 %tmp = load i32, ptr @t2, align 4 43 ret i32 %tmp 44 45; PIC32-LABEL: f2: 46; PIC32-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 47; PIC32-DAG: addiu $4, $[[R0]], %tlsgd(t2) 48; PIC32-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 49; PIC32-DAG: jalr $25 50; PIC32-DAG: lw $2, 0($2) 51 52; PIC64-LABEL: f2: 53; PIC64-DAG: daddiu $[[R0:[a-z0-9]+]], $1, %lo(%neg(%gp_rel(f2))) 54; PIC64-DAG: daddiu $4, $[[R0]], %tlsgd(t2) 55; PIC64-DAG: ld $25, %call16(__tls_get_addr)($[[R0]]) 56; PIC64-DAG: jalr $25 57; PIC64-DAG: lw $2, 0($2) 58 59; MM-LABEL: f2: 60; MM-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 61; MM-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 62; MM-DAG: addiu $4, $[[R0]], %tlsgd(t2) 63; MM-DAG: jalr $25 64; MM-DAG: lw16 $2, 0($2) 65} 66 67@f3.i = internal thread_local unnamed_addr global i32 1, align 4 68 69define dso_preemptable i32 @f3() nounwind { 70entry: 71; PIC32-LABEL: f3: 72; PIC32: addu $[[R0:[a-z0-9]+]], $2, $25 73; PIC32: addiu $4, $[[R0]], %tlsldm(f3.i) 74; PIC32: lw $25, %call16(__tls_get_addr)($[[R0]]) 75; PIC32: jalr $25 76; PIC32: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 77; PIC32: addu $[[R1:[0-9]+]], $[[R0]], $2 78; PIC32: lw $[[R3:[0-9]+]], %dtprel_lo(f3.i)($[[R1]]) 79; PIC32: addiu $[[R3]], $[[R3]], 1 80; PIC32: sw $[[R3]], %dtprel_lo(f3.i)($[[R1]]) 81 82; PIC64-LABEL: f3: 83; PIC64: lui $[[R0:[a-z0-9]+]], %hi(%neg(%gp_rel(f3))) 84; PIC64: daddu $[[R0]], $[[R0]], $25 85; PIC64: daddiu $[[R1:[a-z0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f3))) 86; PIC64: daddiu $4, $[[R1]], %tlsldm(f3.i) 87; PIC64: ld $25, %call16(__tls_get_addr)($[[R1]]) 88; PIC64: jalr $25 89; PIC64: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 90; PIC64: daddu $[[R1:[0-9]+]], $[[R0]], $2 91; PIC64: lw $[[R2:[0-9]+]], %dtprel_lo(f3.i)($[[R1]]) 92; PIC64: addiu $[[R2]], $[[R2]], 1 93; PIC64: sw $[[R2]], %dtprel_lo(f3.i)($[[R1]]) 94 95; MM-LABEL: f3: 96; MM: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i) 97; MM: jalr $25 98; MM: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 99; MM: addu16 $[[R1:[0-9]+]], $[[R0]], $2 100; MM: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]]) 101 102 %0 = load i32, ptr @f3.i, align 4 103 %inc = add nsw i32 %0, 1 104 store i32 %inc, ptr @f3.i, align 4 105 ret i32 %inc 106} 107