1; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 2; RUN: llc -mtriple=mips -mcpu=mips32r6 -mattr=micromips -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MMR6 3 4@i = global i32 0, align 4 5@j = global i32 99, align 4 6@r1 = common global i32 0, align 4 7@r2 = common global i32 0, align 4 8 9define void @test() nounwind { 10entry: 11 %0 = load i32, ptr @i, align 4 12 %cmp = icmp eq i32 %0, 0 13 %conv = zext i1 %cmp to i32 14 store i32 %conv, ptr @r1, align 4 15; 16: sltiu ${{[0-9]+}}, 1 16; MMR6: sltiu ${{[0-9]+}}, ${{[0-9]+}}, 1 17; 16: move ${{[0-9]+}}, $24 18 %1 = load i32, ptr @j, align 4 19 %cmp1 = icmp eq i32 %1, 99 20 %conv2 = zext i1 %cmp1 to i32 21 store i32 %conv2, ptr @r2, align 4 22; 16: xor $[[REGISTER:[0-9A-Ba-b_]+]], ${{[0-9]+}} 23; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 1 24; MMR6: sltiu ${{[0-9]+}}, ${{[0-9]+}}, 1 25; 16: move ${{[0-9]+}}, $24 26 ret void 27} 28