1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=mips -mcpu=mips32r5 -mattr=+msa,+fp64 -relocation-model=pic \ 3; RUN: -verify-machineinstrs < %s \ 4; RUN: | FileCheck -check-prefixes=O32,O32-BE %s 5; RUN: llc -mtriple=mipsel -mcpu=mips32r5 -mattr=+msa,+fp64 -relocation-model=pic \ 6; RUN: -verify-machineinstrs < %s \ 7; RUN: | FileCheck -check-prefixes=O32,O32-LE %s 8; RUN: llc -mtriple=mips64 -mcpu=mips64r5 -target-abi n32 -mattr=+msa,+fp64 \ 9; RUN: -relocation-model=pic -verify-machineinstrs < %s \ 10; RUN: | FileCheck -check-prefixes=N32,N32-BE %s 11; RUN: llc -mtriple=mips64el -mcpu=mips64r5 -target-abi n32 -mattr=+msa,+fp64 \ 12; RUN: -relocation-model=pic -verify-machineinstrs < %s \ 13; RUN: | FileCheck -check-prefixes=N32,N32-LE %s 14; RUN: llc -mtriple=mips64 -mcpu=mips64r5 -mattr=+msa,+fp64 -relocation-model=pic \ 15; RUN: -verify-machineinstrs < %s \ 16; RUN: | FileCheck -check-prefixes=N64,N64-BE %s 17; RUN: llc -mtriple=mips64el -mcpu=mips64r5 -mattr=+msa,+fp64 -relocation-model=pic \ 18; RUN: -verify-machineinstrs < %s \ 19; RUN: | FileCheck -check-prefixes=N64,N64-LE %s 20 21@v4i8 = global <4 x i8> <i8 0, i8 0, i8 0, i8 0> 22@v16i8 = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> 23@v8i16 = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0> 24@v4i32 = global <4 x i32> <i32 0, i32 0, i32 0, i32 0> 25@v2i64 = global <2 x i64> <i64 0, i64 0> 26@i32 = global i32 0 27@i64 = global i64 0 28 29define void @const_v16i8() nounwind { 30; O32-BE-LABEL: const_v16i8: 31; O32-BE: # %bb.0: 32; O32-BE-NEXT: lui $2, %hi(_gp_disp) 33; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 34; O32-BE-NEXT: addu $1, $2, $25 35; O32-BE-NEXT: lw $2, %got(v16i8)($1) 36; O32-BE-NEXT: ldi.b $w0, 0 37; O32-BE-NEXT: st.b $w0, 0($2) 38; O32-BE-NEXT: ldi.b $w0, 1 39; O32-BE-NEXT: st.b $w0, 0($2) 40; O32-BE-NEXT: lw $3, %got($CPI0_0)($1) 41; O32-BE-NEXT: addiu $3, $3, %lo($CPI0_0) 42; O32-BE-NEXT: ld.b $w0, 0($3) 43; O32-BE-NEXT: st.b $w0, 0($2) 44; O32-BE-NEXT: lw $1, %got($CPI0_1)($1) 45; O32-BE-NEXT: addiu $1, $1, %lo($CPI0_1) 46; O32-BE-NEXT: ld.b $w0, 0($1) 47; O32-BE-NEXT: st.b $w0, 0($2) 48; O32-BE-NEXT: ldi.h $w0, 256 49; O32-BE-NEXT: st.b $w0, 0($2) 50; O32-BE-NEXT: lui $1, 258 51; O32-BE-NEXT: ori $1, $1, 772 52; O32-BE-NEXT: fill.w $w0, $1 53; O32-BE-NEXT: st.b $w0, 0($2) 54; O32-BE-NEXT: lui $3, 1286 55; O32-BE-NEXT: ori $3, $3, 1800 56; O32-BE-NEXT: fill.w $w0, $3 57; O32-BE-NEXT: insert.w $w0[1], $1 58; O32-BE-NEXT: splati.d $w0, $w0[0] 59; O32-BE-NEXT: jr $ra 60; O32-BE-NEXT: st.b $w0, 0($2) 61; 62; O32-LE-LABEL: const_v16i8: 63; O32-LE: # %bb.0: 64; O32-LE-NEXT: lui $2, %hi(_gp_disp) 65; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 66; O32-LE-NEXT: addu $1, $2, $25 67; O32-LE-NEXT: lw $2, %got(v16i8)($1) 68; O32-LE-NEXT: ldi.b $w0, 0 69; O32-LE-NEXT: st.b $w0, 0($2) 70; O32-LE-NEXT: ldi.b $w0, 1 71; O32-LE-NEXT: st.b $w0, 0($2) 72; O32-LE-NEXT: lw $3, %got($CPI0_0)($1) 73; O32-LE-NEXT: addiu $3, $3, %lo($CPI0_0) 74; O32-LE-NEXT: ld.b $w0, 0($3) 75; O32-LE-NEXT: st.b $w0, 0($2) 76; O32-LE-NEXT: lw $1, %got($CPI0_1)($1) 77; O32-LE-NEXT: addiu $1, $1, %lo($CPI0_1) 78; O32-LE-NEXT: ld.b $w0, 0($1) 79; O32-LE-NEXT: st.b $w0, 0($2) 80; O32-LE-NEXT: ldi.h $w0, 1 81; O32-LE-NEXT: st.b $w0, 0($2) 82; O32-LE-NEXT: lui $1, 1027 83; O32-LE-NEXT: ori $1, $1, 513 84; O32-LE-NEXT: fill.w $w0, $1 85; O32-LE-NEXT: st.b $w0, 0($2) 86; O32-LE-NEXT: lui $1, 2055 87; O32-LE-NEXT: ori $1, $1, 1541 88; O32-LE-NEXT: insert.w $w0[1], $1 89; O32-LE-NEXT: splati.d $w0, $w0[0] 90; O32-LE-NEXT: jr $ra 91; O32-LE-NEXT: st.b $w0, 0($2) 92; 93; N32-BE-LABEL: const_v16i8: 94; N32-BE: # %bb.0: 95; N32-BE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v16i8))) 96; N32-BE-NEXT: addu $1, $1, $25 97; N32-BE-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v16i8))) 98; N32-BE-NEXT: lw $2, %got_disp(v16i8)($1) 99; N32-BE-NEXT: ldi.b $w0, 0 100; N32-BE-NEXT: st.b $w0, 0($2) 101; N32-BE-NEXT: ldi.b $w0, 1 102; N32-BE-NEXT: st.b $w0, 0($2) 103; N32-BE-NEXT: lw $3, %got_page(.LCPI0_0)($1) 104; N32-BE-NEXT: addiu $3, $3, %got_ofst(.LCPI0_0) 105; N32-BE-NEXT: ld.b $w0, 0($3) 106; N32-BE-NEXT: st.b $w0, 0($2) 107; N32-BE-NEXT: lw $1, %got_page(.LCPI0_1)($1) 108; N32-BE-NEXT: addiu $1, $1, %got_ofst(.LCPI0_1) 109; N32-BE-NEXT: ld.b $w0, 0($1) 110; N32-BE-NEXT: st.b $w0, 0($2) 111; N32-BE-NEXT: ldi.h $w0, 256 112; N32-BE-NEXT: st.b $w0, 0($2) 113; N32-BE-NEXT: lui $1, 258 114; N32-BE-NEXT: ori $1, $1, 772 115; N32-BE-NEXT: fill.w $w0, $1 116; N32-BE-NEXT: st.b $w0, 0($2) 117; N32-BE-NEXT: lui $3, 1286 118; N32-BE-NEXT: ori $3, $3, 1800 119; N32-BE-NEXT: dinsu $3, $1, 32, 32 120; N32-BE-NEXT: fill.d $w0, $3 121; N32-BE-NEXT: jr $ra 122; N32-BE-NEXT: st.b $w0, 0($2) 123; 124; N32-LE-LABEL: const_v16i8: 125; N32-LE: # %bb.0: 126; N32-LE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v16i8))) 127; N32-LE-NEXT: addu $1, $1, $25 128; N32-LE-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v16i8))) 129; N32-LE-NEXT: lw $2, %got_disp(v16i8)($1) 130; N32-LE-NEXT: ldi.b $w0, 0 131; N32-LE-NEXT: st.b $w0, 0($2) 132; N32-LE-NEXT: ldi.b $w0, 1 133; N32-LE-NEXT: st.b $w0, 0($2) 134; N32-LE-NEXT: lw $3, %got_page(.LCPI0_0)($1) 135; N32-LE-NEXT: addiu $3, $3, %got_ofst(.LCPI0_0) 136; N32-LE-NEXT: ld.b $w0, 0($3) 137; N32-LE-NEXT: st.b $w0, 0($2) 138; N32-LE-NEXT: lw $1, %got_page(.LCPI0_1)($1) 139; N32-LE-NEXT: addiu $1, $1, %got_ofst(.LCPI0_1) 140; N32-LE-NEXT: ld.b $w0, 0($1) 141; N32-LE-NEXT: st.b $w0, 0($2) 142; N32-LE-NEXT: ldi.h $w0, 1 143; N32-LE-NEXT: st.b $w0, 0($2) 144; N32-LE-NEXT: lui $1, 1027 145; N32-LE-NEXT: ori $1, $1, 513 146; N32-LE-NEXT: fill.w $w0, $1 147; N32-LE-NEXT: st.b $w0, 0($2) 148; N32-LE-NEXT: lui $3, 2055 149; N32-LE-NEXT: ori $3, $3, 1541 150; N32-LE-NEXT: dinsu $1, $3, 32, 32 151; N32-LE-NEXT: fill.d $w0, $1 152; N32-LE-NEXT: jr $ra 153; N32-LE-NEXT: st.b $w0, 0($2) 154; 155; N64-BE-LABEL: const_v16i8: 156; N64-BE: # %bb.0: 157; N64-BE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v16i8))) 158; N64-BE-NEXT: daddu $1, $1, $25 159; N64-BE-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v16i8))) 160; N64-BE-NEXT: ld $2, %got_disp(v16i8)($1) 161; N64-BE-NEXT: ldi.b $w0, 0 162; N64-BE-NEXT: st.b $w0, 0($2) 163; N64-BE-NEXT: ldi.b $w0, 1 164; N64-BE-NEXT: st.b $w0, 0($2) 165; N64-BE-NEXT: ld $3, %got_page(.LCPI0_0)($1) 166; N64-BE-NEXT: daddiu $3, $3, %got_ofst(.LCPI0_0) 167; N64-BE-NEXT: ld.b $w0, 0($3) 168; N64-BE-NEXT: st.b $w0, 0($2) 169; N64-BE-NEXT: ld $1, %got_page(.LCPI0_1)($1) 170; N64-BE-NEXT: daddiu $1, $1, %got_ofst(.LCPI0_1) 171; N64-BE-NEXT: ld.b $w0, 0($1) 172; N64-BE-NEXT: st.b $w0, 0($2) 173; N64-BE-NEXT: ldi.h $w0, 256 174; N64-BE-NEXT: st.b $w0, 0($2) 175; N64-BE-NEXT: lui $1, 258 176; N64-BE-NEXT: ori $1, $1, 772 177; N64-BE-NEXT: fill.w $w0, $1 178; N64-BE-NEXT: st.b $w0, 0($2) 179; N64-BE-NEXT: lui $3, 1286 180; N64-BE-NEXT: ori $3, $3, 1800 181; N64-BE-NEXT: dinsu $3, $1, 32, 32 182; N64-BE-NEXT: fill.d $w0, $3 183; N64-BE-NEXT: jr $ra 184; N64-BE-NEXT: st.b $w0, 0($2) 185; 186; N64-LE-LABEL: const_v16i8: 187; N64-LE: # %bb.0: 188; N64-LE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v16i8))) 189; N64-LE-NEXT: daddu $1, $1, $25 190; N64-LE-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v16i8))) 191; N64-LE-NEXT: ld $2, %got_disp(v16i8)($1) 192; N64-LE-NEXT: ldi.b $w0, 0 193; N64-LE-NEXT: st.b $w0, 0($2) 194; N64-LE-NEXT: ldi.b $w0, 1 195; N64-LE-NEXT: st.b $w0, 0($2) 196; N64-LE-NEXT: ld $3, %got_page(.LCPI0_0)($1) 197; N64-LE-NEXT: daddiu $3, $3, %got_ofst(.LCPI0_0) 198; N64-LE-NEXT: ld.b $w0, 0($3) 199; N64-LE-NEXT: st.b $w0, 0($2) 200; N64-LE-NEXT: ld $1, %got_page(.LCPI0_1)($1) 201; N64-LE-NEXT: daddiu $1, $1, %got_ofst(.LCPI0_1) 202; N64-LE-NEXT: ld.b $w0, 0($1) 203; N64-LE-NEXT: st.b $w0, 0($2) 204; N64-LE-NEXT: ldi.h $w0, 1 205; N64-LE-NEXT: st.b $w0, 0($2) 206; N64-LE-NEXT: lui $1, 1027 207; N64-LE-NEXT: ori $1, $1, 513 208; N64-LE-NEXT: fill.w $w0, $1 209; N64-LE-NEXT: st.b $w0, 0($2) 210; N64-LE-NEXT: lui $3, 2055 211; N64-LE-NEXT: ori $3, $3, 1541 212; N64-LE-NEXT: dinsu $1, $3, 32, 32 213; N64-LE-NEXT: fill.d $w0, $1 214; N64-LE-NEXT: jr $ra 215; N64-LE-NEXT: st.b $w0, 0($2) 216 store volatile <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, ptr @v16i8 217 store volatile <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, ptr @v16i8 218 store volatile <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 31>, ptr @v16i8 219 store volatile <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6>, ptr @v16i8 220 store volatile <16 x i8> <i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0>, ptr @v16i8 221 store volatile <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4>, ptr @v16i8 222 store volatile <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, ptr @v16i8 223 ret void 224} 225 226define void @const_v8i16() nounwind { 227; O32-BE-LABEL: const_v8i16: 228; O32-BE: # %bb.0: 229; O32-BE-NEXT: lui $2, %hi(_gp_disp) 230; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 231; O32-BE-NEXT: addu $1, $2, $25 232; O32-BE-NEXT: ldi.b $w0, 0 233; O32-BE-NEXT: lw $2, %got(v8i16)($1) 234; O32-BE-NEXT: st.h $w0, 0($2) 235; O32-BE-NEXT: ldi.h $w0, 1 236; O32-BE-NEXT: st.h $w0, 0($2) 237; O32-BE-NEXT: lw $1, %got($CPI1_0)($1) 238; O32-BE-NEXT: addiu $1, $1, %lo($CPI1_0) 239; O32-BE-NEXT: ld.h $w0, 0($1) 240; O32-BE-NEXT: st.h $w0, 0($2) 241; O32-BE-NEXT: ldi.b $w0, 4 242; O32-BE-NEXT: st.h $w0, 0($2) 243; O32-BE-NEXT: lui $1, 1 244; O32-BE-NEXT: ori $1, $1, 2 245; O32-BE-NEXT: fill.w $w0, $1 246; O32-BE-NEXT: st.h $w0, 0($2) 247; O32-BE-NEXT: lui $3, 3 248; O32-BE-NEXT: ori $3, $3, 4 249; O32-BE-NEXT: fill.w $w0, $3 250; O32-BE-NEXT: insert.w $w0[1], $1 251; O32-BE-NEXT: splati.d $w0, $w0[0] 252; O32-BE-NEXT: jr $ra 253; O32-BE-NEXT: st.h $w0, 0($2) 254; 255; O32-LE-LABEL: const_v8i16: 256; O32-LE: # %bb.0: 257; O32-LE-NEXT: lui $2, %hi(_gp_disp) 258; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 259; O32-LE-NEXT: addu $1, $2, $25 260; O32-LE-NEXT: ldi.b $w0, 0 261; O32-LE-NEXT: lw $2, %got(v8i16)($1) 262; O32-LE-NEXT: st.h $w0, 0($2) 263; O32-LE-NEXT: ldi.h $w0, 1 264; O32-LE-NEXT: st.h $w0, 0($2) 265; O32-LE-NEXT: lw $1, %got($CPI1_0)($1) 266; O32-LE-NEXT: addiu $1, $1, %lo($CPI1_0) 267; O32-LE-NEXT: ld.h $w0, 0($1) 268; O32-LE-NEXT: st.h $w0, 0($2) 269; O32-LE-NEXT: ldi.b $w0, 4 270; O32-LE-NEXT: st.h $w0, 0($2) 271; O32-LE-NEXT: lui $1, 2 272; O32-LE-NEXT: ori $1, $1, 1 273; O32-LE-NEXT: fill.w $w0, $1 274; O32-LE-NEXT: st.h $w0, 0($2) 275; O32-LE-NEXT: lui $1, 4 276; O32-LE-NEXT: ori $1, $1, 3 277; O32-LE-NEXT: insert.w $w0[1], $1 278; O32-LE-NEXT: splati.d $w0, $w0[0] 279; O32-LE-NEXT: jr $ra 280; O32-LE-NEXT: st.h $w0, 0($2) 281; 282; N32-BE-LABEL: const_v8i16: 283; N32-BE: # %bb.0: 284; N32-BE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v8i16))) 285; N32-BE-NEXT: addu $1, $1, $25 286; N32-BE-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v8i16))) 287; N32-BE-NEXT: ldi.b $w0, 0 288; N32-BE-NEXT: lw $2, %got_disp(v8i16)($1) 289; N32-BE-NEXT: st.h $w0, 0($2) 290; N32-BE-NEXT: ldi.h $w0, 1 291; N32-BE-NEXT: st.h $w0, 0($2) 292; N32-BE-NEXT: lw $1, %got_page(.LCPI1_0)($1) 293; N32-BE-NEXT: addiu $1, $1, %got_ofst(.LCPI1_0) 294; N32-BE-NEXT: ld.h $w0, 0($1) 295; N32-BE-NEXT: st.h $w0, 0($2) 296; N32-BE-NEXT: ldi.b $w0, 4 297; N32-BE-NEXT: st.h $w0, 0($2) 298; N32-BE-NEXT: lui $1, 1 299; N32-BE-NEXT: ori $1, $1, 2 300; N32-BE-NEXT: fill.w $w0, $1 301; N32-BE-NEXT: st.h $w0, 0($2) 302; N32-BE-NEXT: lui $3, 3 303; N32-BE-NEXT: ori $3, $3, 4 304; N32-BE-NEXT: dinsu $3, $1, 32, 32 305; N32-BE-NEXT: fill.d $w0, $3 306; N32-BE-NEXT: jr $ra 307; N32-BE-NEXT: st.h $w0, 0($2) 308; 309; N32-LE-LABEL: const_v8i16: 310; N32-LE: # %bb.0: 311; N32-LE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v8i16))) 312; N32-LE-NEXT: addu $1, $1, $25 313; N32-LE-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v8i16))) 314; N32-LE-NEXT: ldi.b $w0, 0 315; N32-LE-NEXT: lw $2, %got_disp(v8i16)($1) 316; N32-LE-NEXT: st.h $w0, 0($2) 317; N32-LE-NEXT: ldi.h $w0, 1 318; N32-LE-NEXT: st.h $w0, 0($2) 319; N32-LE-NEXT: lw $1, %got_page(.LCPI1_0)($1) 320; N32-LE-NEXT: addiu $1, $1, %got_ofst(.LCPI1_0) 321; N32-LE-NEXT: ld.h $w0, 0($1) 322; N32-LE-NEXT: st.h $w0, 0($2) 323; N32-LE-NEXT: ldi.b $w0, 4 324; N32-LE-NEXT: st.h $w0, 0($2) 325; N32-LE-NEXT: lui $1, 2 326; N32-LE-NEXT: ori $1, $1, 1 327; N32-LE-NEXT: fill.w $w0, $1 328; N32-LE-NEXT: st.h $w0, 0($2) 329; N32-LE-NEXT: lui $3, 4 330; N32-LE-NEXT: ori $3, $3, 3 331; N32-LE-NEXT: dinsu $1, $3, 32, 32 332; N32-LE-NEXT: fill.d $w0, $1 333; N32-LE-NEXT: jr $ra 334; N32-LE-NEXT: st.h $w0, 0($2) 335; 336; N64-BE-LABEL: const_v8i16: 337; N64-BE: # %bb.0: 338; N64-BE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v8i16))) 339; N64-BE-NEXT: daddu $1, $1, $25 340; N64-BE-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v8i16))) 341; N64-BE-NEXT: ldi.b $w0, 0 342; N64-BE-NEXT: ld $2, %got_disp(v8i16)($1) 343; N64-BE-NEXT: st.h $w0, 0($2) 344; N64-BE-NEXT: ldi.h $w0, 1 345; N64-BE-NEXT: st.h $w0, 0($2) 346; N64-BE-NEXT: ld $1, %got_page(.LCPI1_0)($1) 347; N64-BE-NEXT: daddiu $1, $1, %got_ofst(.LCPI1_0) 348; N64-BE-NEXT: ld.h $w0, 0($1) 349; N64-BE-NEXT: st.h $w0, 0($2) 350; N64-BE-NEXT: ldi.b $w0, 4 351; N64-BE-NEXT: st.h $w0, 0($2) 352; N64-BE-NEXT: lui $1, 1 353; N64-BE-NEXT: ori $1, $1, 2 354; N64-BE-NEXT: fill.w $w0, $1 355; N64-BE-NEXT: st.h $w0, 0($2) 356; N64-BE-NEXT: lui $3, 3 357; N64-BE-NEXT: ori $3, $3, 4 358; N64-BE-NEXT: dinsu $3, $1, 32, 32 359; N64-BE-NEXT: fill.d $w0, $3 360; N64-BE-NEXT: jr $ra 361; N64-BE-NEXT: st.h $w0, 0($2) 362; 363; N64-LE-LABEL: const_v8i16: 364; N64-LE: # %bb.0: 365; N64-LE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v8i16))) 366; N64-LE-NEXT: daddu $1, $1, $25 367; N64-LE-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v8i16))) 368; N64-LE-NEXT: ldi.b $w0, 0 369; N64-LE-NEXT: ld $2, %got_disp(v8i16)($1) 370; N64-LE-NEXT: st.h $w0, 0($2) 371; N64-LE-NEXT: ldi.h $w0, 1 372; N64-LE-NEXT: st.h $w0, 0($2) 373; N64-LE-NEXT: ld $1, %got_page(.LCPI1_0)($1) 374; N64-LE-NEXT: daddiu $1, $1, %got_ofst(.LCPI1_0) 375; N64-LE-NEXT: ld.h $w0, 0($1) 376; N64-LE-NEXT: st.h $w0, 0($2) 377; N64-LE-NEXT: ldi.b $w0, 4 378; N64-LE-NEXT: st.h $w0, 0($2) 379; N64-LE-NEXT: lui $1, 2 380; N64-LE-NEXT: ori $1, $1, 1 381; N64-LE-NEXT: fill.w $w0, $1 382; N64-LE-NEXT: st.h $w0, 0($2) 383; N64-LE-NEXT: lui $3, 4 384; N64-LE-NEXT: ori $3, $3, 3 385; N64-LE-NEXT: dinsu $1, $3, 32, 32 386; N64-LE-NEXT: fill.d $w0, $1 387; N64-LE-NEXT: jr $ra 388; N64-LE-NEXT: st.h $w0, 0($2) 389 store volatile <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, ptr @v8i16 390 store volatile <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, ptr @v8i16 391 store volatile <8 x i16> <i16 1, i16 1, i16 1, i16 2, i16 1, i16 1, i16 1, i16 31>, ptr @v8i16 392 store volatile <8 x i16> <i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028>, ptr @v8i16 393 store volatile <8 x i16> <i16 1, i16 2, i16 1, i16 2, i16 1, i16 2, i16 1, i16 2>, ptr @v8i16 394 store volatile <8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 1, i16 2, i16 3, i16 4>, ptr @v8i16 395 ret void 396} 397 398define void @const_v4i32() nounwind { 399; O32-BE-LABEL: const_v4i32: 400; O32-BE: # %bb.0: 401; O32-BE-NEXT: lui $2, %hi(_gp_disp) 402; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 403; O32-BE-NEXT: addu $1, $2, $25 404; O32-BE-NEXT: ldi.b $w0, 0 405; O32-BE-NEXT: lw $2, %got(v4i32)($1) 406; O32-BE-NEXT: st.w $w0, 0($2) 407; O32-BE-NEXT: ldi.w $w0, 1 408; O32-BE-NEXT: st.w $w0, 0($2) 409; O32-BE-NEXT: lw $3, %got($CPI2_0)($1) 410; O32-BE-NEXT: addiu $3, $3, %lo($CPI2_0) 411; O32-BE-NEXT: ld.w $w0, 0($3) 412; O32-BE-NEXT: st.w $w0, 0($2) 413; O32-BE-NEXT: ldi.b $w0, 1 414; O32-BE-NEXT: st.w $w0, 0($2) 415; O32-BE-NEXT: ldi.h $w0, 1 416; O32-BE-NEXT: st.w $w0, 0($2) 417; O32-BE-NEXT: ori $3, $zero, 1 418; O32-BE-NEXT: ori $4, $zero, 2 419; O32-BE-NEXT: fill.w $w0, $4 420; O32-BE-NEXT: insert.w $w0[1], $3 421; O32-BE-NEXT: splati.d $w0, $w0[0] 422; O32-BE-NEXT: st.w $w0, 0($2) 423; O32-BE-NEXT: lw $1, %got($CPI2_1)($1) 424; O32-BE-NEXT: addiu $1, $1, %lo($CPI2_1) 425; O32-BE-NEXT: ld.w $w0, 0($1) 426; O32-BE-NEXT: jr $ra 427; O32-BE-NEXT: st.w $w0, 0($2) 428; 429; O32-LE-LABEL: const_v4i32: 430; O32-LE: # %bb.0: 431; O32-LE-NEXT: lui $2, %hi(_gp_disp) 432; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 433; O32-LE-NEXT: addu $1, $2, $25 434; O32-LE-NEXT: ldi.b $w0, 0 435; O32-LE-NEXT: lw $2, %got(v4i32)($1) 436; O32-LE-NEXT: st.w $w0, 0($2) 437; O32-LE-NEXT: ldi.w $w0, 1 438; O32-LE-NEXT: st.w $w0, 0($2) 439; O32-LE-NEXT: lw $3, %got($CPI2_0)($1) 440; O32-LE-NEXT: addiu $3, $3, %lo($CPI2_0) 441; O32-LE-NEXT: ld.w $w0, 0($3) 442; O32-LE-NEXT: st.w $w0, 0($2) 443; O32-LE-NEXT: ldi.b $w0, 1 444; O32-LE-NEXT: st.w $w0, 0($2) 445; O32-LE-NEXT: ldi.h $w0, 1 446; O32-LE-NEXT: st.w $w0, 0($2) 447; O32-LE-NEXT: ori $3, $zero, 2 448; O32-LE-NEXT: ori $4, $zero, 1 449; O32-LE-NEXT: fill.w $w0, $4 450; O32-LE-NEXT: insert.w $w0[1], $3 451; O32-LE-NEXT: splati.d $w0, $w0[0] 452; O32-LE-NEXT: st.w $w0, 0($2) 453; O32-LE-NEXT: lw $1, %got($CPI2_1)($1) 454; O32-LE-NEXT: addiu $1, $1, %lo($CPI2_1) 455; O32-LE-NEXT: ld.w $w0, 0($1) 456; O32-LE-NEXT: jr $ra 457; O32-LE-NEXT: st.w $w0, 0($2) 458; 459; N32-BE-LABEL: const_v4i32: 460; N32-BE: # %bb.0: 461; N32-BE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v4i32))) 462; N32-BE-NEXT: addu $1, $1, $25 463; N32-BE-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v4i32))) 464; N32-BE-NEXT: ldi.b $w0, 0 465; N32-BE-NEXT: lw $2, %got_disp(v4i32)($1) 466; N32-BE-NEXT: st.w $w0, 0($2) 467; N32-BE-NEXT: ldi.w $w0, 1 468; N32-BE-NEXT: st.w $w0, 0($2) 469; N32-BE-NEXT: lw $3, %got_page(.LCPI2_0)($1) 470; N32-BE-NEXT: addiu $3, $3, %got_ofst(.LCPI2_0) 471; N32-BE-NEXT: ld.w $w0, 0($3) 472; N32-BE-NEXT: st.w $w0, 0($2) 473; N32-BE-NEXT: ldi.b $w0, 1 474; N32-BE-NEXT: st.w $w0, 0($2) 475; N32-BE-NEXT: ldi.h $w0, 1 476; N32-BE-NEXT: st.w $w0, 0($2) 477; N32-BE-NEXT: ori $3, $zero, 2 478; N32-BE-NEXT: ori $4, $zero, 1 479; N32-BE-NEXT: dinsu $3, $4, 32, 32 480; N32-BE-NEXT: fill.d $w0, $3 481; N32-BE-NEXT: st.w $w0, 0($2) 482; N32-BE-NEXT: lw $1, %got_page(.LCPI2_1)($1) 483; N32-BE-NEXT: addiu $1, $1, %got_ofst(.LCPI2_1) 484; N32-BE-NEXT: ld.w $w0, 0($1) 485; N32-BE-NEXT: jr $ra 486; N32-BE-NEXT: st.w $w0, 0($2) 487; 488; N32-LE-LABEL: const_v4i32: 489; N32-LE: # %bb.0: 490; N32-LE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v4i32))) 491; N32-LE-NEXT: addu $1, $1, $25 492; N32-LE-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v4i32))) 493; N32-LE-NEXT: ldi.b $w0, 0 494; N32-LE-NEXT: lw $2, %got_disp(v4i32)($1) 495; N32-LE-NEXT: st.w $w0, 0($2) 496; N32-LE-NEXT: ldi.w $w0, 1 497; N32-LE-NEXT: st.w $w0, 0($2) 498; N32-LE-NEXT: lw $3, %got_page(.LCPI2_0)($1) 499; N32-LE-NEXT: addiu $3, $3, %got_ofst(.LCPI2_0) 500; N32-LE-NEXT: ld.w $w0, 0($3) 501; N32-LE-NEXT: st.w $w0, 0($2) 502; N32-LE-NEXT: ldi.b $w0, 1 503; N32-LE-NEXT: st.w $w0, 0($2) 504; N32-LE-NEXT: ldi.h $w0, 1 505; N32-LE-NEXT: st.w $w0, 0($2) 506; N32-LE-NEXT: ori $3, $zero, 1 507; N32-LE-NEXT: ori $4, $zero, 2 508; N32-LE-NEXT: dinsu $3, $4, 32, 32 509; N32-LE-NEXT: fill.d $w0, $3 510; N32-LE-NEXT: st.w $w0, 0($2) 511; N32-LE-NEXT: lw $1, %got_page(.LCPI2_1)($1) 512; N32-LE-NEXT: addiu $1, $1, %got_ofst(.LCPI2_1) 513; N32-LE-NEXT: ld.w $w0, 0($1) 514; N32-LE-NEXT: jr $ra 515; N32-LE-NEXT: st.w $w0, 0($2) 516; 517; N64-BE-LABEL: const_v4i32: 518; N64-BE: # %bb.0: 519; N64-BE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v4i32))) 520; N64-BE-NEXT: daddu $1, $1, $25 521; N64-BE-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v4i32))) 522; N64-BE-NEXT: ldi.b $w0, 0 523; N64-BE-NEXT: ld $2, %got_disp(v4i32)($1) 524; N64-BE-NEXT: st.w $w0, 0($2) 525; N64-BE-NEXT: ldi.w $w0, 1 526; N64-BE-NEXT: st.w $w0, 0($2) 527; N64-BE-NEXT: ld $3, %got_page(.LCPI2_0)($1) 528; N64-BE-NEXT: daddiu $3, $3, %got_ofst(.LCPI2_0) 529; N64-BE-NEXT: ld.w $w0, 0($3) 530; N64-BE-NEXT: st.w $w0, 0($2) 531; N64-BE-NEXT: ldi.b $w0, 1 532; N64-BE-NEXT: st.w $w0, 0($2) 533; N64-BE-NEXT: ldi.h $w0, 1 534; N64-BE-NEXT: st.w $w0, 0($2) 535; N64-BE-NEXT: ori $3, $zero, 2 536; N64-BE-NEXT: ori $4, $zero, 1 537; N64-BE-NEXT: dinsu $3, $4, 32, 32 538; N64-BE-NEXT: fill.d $w0, $3 539; N64-BE-NEXT: st.w $w0, 0($2) 540; N64-BE-NEXT: ld $1, %got_page(.LCPI2_1)($1) 541; N64-BE-NEXT: daddiu $1, $1, %got_ofst(.LCPI2_1) 542; N64-BE-NEXT: ld.w $w0, 0($1) 543; N64-BE-NEXT: jr $ra 544; N64-BE-NEXT: st.w $w0, 0($2) 545; 546; N64-LE-LABEL: const_v4i32: 547; N64-LE: # %bb.0: 548; N64-LE-NEXT: lui $1, %hi(%neg(%gp_rel(const_v4i32))) 549; N64-LE-NEXT: daddu $1, $1, $25 550; N64-LE-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v4i32))) 551; N64-LE-NEXT: ldi.b $w0, 0 552; N64-LE-NEXT: ld $2, %got_disp(v4i32)($1) 553; N64-LE-NEXT: st.w $w0, 0($2) 554; N64-LE-NEXT: ldi.w $w0, 1 555; N64-LE-NEXT: st.w $w0, 0($2) 556; N64-LE-NEXT: ld $3, %got_page(.LCPI2_0)($1) 557; N64-LE-NEXT: daddiu $3, $3, %got_ofst(.LCPI2_0) 558; N64-LE-NEXT: ld.w $w0, 0($3) 559; N64-LE-NEXT: st.w $w0, 0($2) 560; N64-LE-NEXT: ldi.b $w0, 1 561; N64-LE-NEXT: st.w $w0, 0($2) 562; N64-LE-NEXT: ldi.h $w0, 1 563; N64-LE-NEXT: st.w $w0, 0($2) 564; N64-LE-NEXT: ori $3, $zero, 1 565; N64-LE-NEXT: ori $4, $zero, 2 566; N64-LE-NEXT: dinsu $3, $4, 32, 32 567; N64-LE-NEXT: fill.d $w0, $3 568; N64-LE-NEXT: st.w $w0, 0($2) 569; N64-LE-NEXT: ld $1, %got_page(.LCPI2_1)($1) 570; N64-LE-NEXT: daddiu $1, $1, %got_ofst(.LCPI2_1) 571; N64-LE-NEXT: ld.w $w0, 0($1) 572; N64-LE-NEXT: jr $ra 573; N64-LE-NEXT: st.w $w0, 0($2) 574 store volatile <4 x i32> <i32 0, i32 0, i32 0, i32 0>, ptr @v4i32 575 store volatile <4 x i32> <i32 1, i32 1, i32 1, i32 1>, ptr @v4i32 576 store volatile <4 x i32> <i32 1, i32 1, i32 1, i32 31>, ptr @v4i32 577 store volatile <4 x i32> <i32 16843009, i32 16843009, i32 16843009, i32 16843009>, ptr @v4i32 578 store volatile <4 x i32> <i32 65537, i32 65537, i32 65537, i32 65537>, ptr @v4i32 579 store volatile <4 x i32> <i32 1, i32 2, i32 1, i32 2>, ptr @v4i32 580 store volatile <4 x i32> <i32 3, i32 4, i32 5, i32 6>, ptr @v4i32 581 ret void 582} 583 584define void @const_v2i64() nounwind { 585; O32-LABEL: const_v2i64: 586; O32: # %bb.0: 587; O32-NEXT: lui $2, %hi(_gp_disp) 588; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 589; O32-NEXT: addu $1, $2, $25 590; O32-NEXT: ldi.b $w0, 0 591; O32-NEXT: lw $2, %got(v2i64)($1) 592; O32-NEXT: st.w $w0, 0($2) 593; O32-NEXT: ldi.b $w0, 1 594; O32-NEXT: st.w $w0, 0($2) 595; O32-NEXT: ldi.h $w0, 1 596; O32-NEXT: st.w $w0, 0($2) 597; O32-NEXT: ldi.w $w0, 1 598; O32-NEXT: st.w $w0, 0($2) 599; O32-NEXT: ldi.d $w0, 1 600; O32-NEXT: st.w $w0, 0($2) 601; O32-NEXT: lw $3, %got($CPI3_0)($1) 602; O32-NEXT: addiu $3, $3, %lo($CPI3_0) 603; O32-NEXT: ld.w $w0, 0($3) 604; O32-NEXT: st.w $w0, 0($2) 605; O32-NEXT: lw $1, %got($CPI3_1)($1) 606; O32-NEXT: addiu $1, $1, %lo($CPI3_1) 607; O32-NEXT: ld.w $w0, 0($1) 608; O32-NEXT: jr $ra 609; O32-NEXT: st.w $w0, 0($2) 610; 611; N32-LABEL: const_v2i64: 612; N32: # %bb.0: 613; N32-NEXT: lui $1, %hi(%neg(%gp_rel(const_v2i64))) 614; N32-NEXT: addu $1, $1, $25 615; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(const_v2i64))) 616; N32-NEXT: ldi.b $w0, 0 617; N32-NEXT: lw $2, %got_disp(v2i64)($1) 618; N32-NEXT: st.d $w0, 0($2) 619; N32-NEXT: ldi.b $w0, 1 620; N32-NEXT: st.d $w0, 0($2) 621; N32-NEXT: ldi.h $w0, 1 622; N32-NEXT: st.d $w0, 0($2) 623; N32-NEXT: ldi.w $w0, 1 624; N32-NEXT: st.d $w0, 0($2) 625; N32-NEXT: ldi.d $w0, 1 626; N32-NEXT: st.d $w0, 0($2) 627; N32-NEXT: lw $3, %got_page(.LCPI3_0)($1) 628; N32-NEXT: addiu $3, $3, %got_ofst(.LCPI3_0) 629; N32-NEXT: ld.d $w0, 0($3) 630; N32-NEXT: st.d $w0, 0($2) 631; N32-NEXT: lw $1, %got_page(.LCPI3_1)($1) 632; N32-NEXT: addiu $1, $1, %got_ofst(.LCPI3_1) 633; N32-NEXT: ld.d $w0, 0($1) 634; N32-NEXT: jr $ra 635; N32-NEXT: st.d $w0, 0($2) 636; 637; N64-LABEL: const_v2i64: 638; N64: # %bb.0: 639; N64-NEXT: lui $1, %hi(%neg(%gp_rel(const_v2i64))) 640; N64-NEXT: daddu $1, $1, $25 641; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(const_v2i64))) 642; N64-NEXT: ldi.b $w0, 0 643; N64-NEXT: ld $2, %got_disp(v2i64)($1) 644; N64-NEXT: st.d $w0, 0($2) 645; N64-NEXT: ldi.b $w0, 1 646; N64-NEXT: st.d $w0, 0($2) 647; N64-NEXT: ldi.h $w0, 1 648; N64-NEXT: st.d $w0, 0($2) 649; N64-NEXT: ldi.w $w0, 1 650; N64-NEXT: st.d $w0, 0($2) 651; N64-NEXT: ldi.d $w0, 1 652; N64-NEXT: st.d $w0, 0($2) 653; N64-NEXT: ld $3, %got_page(.LCPI3_0)($1) 654; N64-NEXT: daddiu $3, $3, %got_ofst(.LCPI3_0) 655; N64-NEXT: ld.d $w0, 0($3) 656; N64-NEXT: st.d $w0, 0($2) 657; N64-NEXT: ld $1, %got_page(.LCPI3_1)($1) 658; N64-NEXT: daddiu $1, $1, %got_ofst(.LCPI3_1) 659; N64-NEXT: ld.d $w0, 0($1) 660; N64-NEXT: jr $ra 661; N64-NEXT: st.d $w0, 0($2) 662 store volatile <2 x i64> <i64 0, i64 0>, ptr @v2i64 663 store volatile <2 x i64> <i64 72340172838076673, i64 72340172838076673>, ptr @v2i64 664 store volatile <2 x i64> <i64 281479271743489, i64 281479271743489>, ptr @v2i64 665 store volatile <2 x i64> <i64 4294967297, i64 4294967297>, ptr @v2i64 666 store volatile <2 x i64> <i64 1, i64 1>, ptr @v2i64 667 store volatile <2 x i64> <i64 1, i64 31>, ptr @v2i64 668 store volatile <2 x i64> <i64 3, i64 4>, ptr @v2i64 669 ret void 670} 671 672define void @nonconst_v16i8(i8 signext %a, i8 signext %b, i8 signext %c, i8 signext %d, i8 signext %e, i8 signext %f, i8 signext %g, i8 signext %h) nounwind { 673; O32-LABEL: nonconst_v16i8: 674; O32: # %bb.0: 675; O32-NEXT: lui $2, %hi(_gp_disp) 676; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 677; O32-NEXT: addu $1, $2, $25 678; O32-NEXT: insert.b $w0[0], $4 679; O32-NEXT: insert.b $w0[1], $5 680; O32-NEXT: insert.b $w0[2], $6 681; O32-NEXT: insert.b $w0[3], $7 682; O32-NEXT: lw $2, 16($sp) 683; O32-NEXT: insert.b $w0[4], $2 684; O32-NEXT: lw $2, 20($sp) 685; O32-NEXT: insert.b $w0[5], $2 686; O32-NEXT: lw $2, 28($sp) 687; O32-NEXT: lw $3, 24($sp) 688; O32-NEXT: lw $1, %got(v16i8)($1) 689; O32-NEXT: insert.b $w0[6], $3 690; O32-NEXT: insert.b $w0[7], $2 691; O32-NEXT: insert.b $w0[8], $2 692; O32-NEXT: insert.b $w0[9], $2 693; O32-NEXT: insert.b $w0[10], $2 694; O32-NEXT: insert.b $w0[11], $2 695; O32-NEXT: insert.b $w0[12], $2 696; O32-NEXT: insert.b $w0[13], $2 697; O32-NEXT: insert.b $w0[14], $2 698; O32-NEXT: insert.b $w0[15], $2 699; O32-NEXT: jr $ra 700; O32-NEXT: st.b $w0, 0($1) 701; 702; N32-LABEL: nonconst_v16i8: 703; N32: # %bb.0: 704; N32-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v16i8))) 705; N32-NEXT: addu $1, $1, $25 706; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(nonconst_v16i8))) 707; N32-NEXT: insert.b $w0[0], $4 708; N32-NEXT: insert.b $w0[1], $5 709; N32-NEXT: insert.b $w0[2], $6 710; N32-NEXT: insert.b $w0[3], $7 711; N32-NEXT: insert.b $w0[4], $8 712; N32-NEXT: lw $1, %got_disp(v16i8)($1) 713; N32-NEXT: insert.b $w0[5], $9 714; N32-NEXT: insert.b $w0[6], $10 715; N32-NEXT: insert.b $w0[7], $11 716; N32-NEXT: insert.b $w0[8], $11 717; N32-NEXT: insert.b $w0[9], $11 718; N32-NEXT: insert.b $w0[10], $11 719; N32-NEXT: insert.b $w0[11], $11 720; N32-NEXT: insert.b $w0[12], $11 721; N32-NEXT: insert.b $w0[13], $11 722; N32-NEXT: insert.b $w0[14], $11 723; N32-NEXT: insert.b $w0[15], $11 724; N32-NEXT: jr $ra 725; N32-NEXT: st.b $w0, 0($1) 726; 727; N64-LABEL: nonconst_v16i8: 728; N64: # %bb.0: 729; N64-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v16i8))) 730; N64-NEXT: daddu $1, $1, $25 731; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(nonconst_v16i8))) 732; N64-NEXT: insert.b $w0[0], $4 733; N64-NEXT: insert.b $w0[1], $5 734; N64-NEXT: insert.b $w0[2], $6 735; N64-NEXT: insert.b $w0[3], $7 736; N64-NEXT: insert.b $w0[4], $8 737; N64-NEXT: ld $1, %got_disp(v16i8)($1) 738; N64-NEXT: insert.b $w0[5], $9 739; N64-NEXT: insert.b $w0[6], $10 740; N64-NEXT: insert.b $w0[7], $11 741; N64-NEXT: insert.b $w0[8], $11 742; N64-NEXT: insert.b $w0[9], $11 743; N64-NEXT: insert.b $w0[10], $11 744; N64-NEXT: insert.b $w0[11], $11 745; N64-NEXT: insert.b $w0[12], $11 746; N64-NEXT: insert.b $w0[13], $11 747; N64-NEXT: insert.b $w0[14], $11 748; N64-NEXT: insert.b $w0[15], $11 749; N64-NEXT: jr $ra 750; N64-NEXT: st.b $w0, 0($1) 751 %1 = insertelement <16 x i8> undef, i8 %a, i32 0 752 %2 = insertelement <16 x i8> %1, i8 %b, i32 1 753 %3 = insertelement <16 x i8> %2, i8 %c, i32 2 754 %4 = insertelement <16 x i8> %3, i8 %d, i32 3 755 %5 = insertelement <16 x i8> %4, i8 %e, i32 4 756 %6 = insertelement <16 x i8> %5, i8 %f, i32 5 757 %7 = insertelement <16 x i8> %6, i8 %g, i32 6 758 %8 = insertelement <16 x i8> %7, i8 %h, i32 7 759 %9 = insertelement <16 x i8> %8, i8 %h, i32 8 760 %10 = insertelement <16 x i8> %9, i8 %h, i32 9 761 %11 = insertelement <16 x i8> %10, i8 %h, i32 10 762 %12 = insertelement <16 x i8> %11, i8 %h, i32 11 763 %13 = insertelement <16 x i8> %12, i8 %h, i32 12 764 %14 = insertelement <16 x i8> %13, i8 %h, i32 13 765 %15 = insertelement <16 x i8> %14, i8 %h, i32 14 766 %16 = insertelement <16 x i8> %15, i8 %h, i32 15 767 store volatile <16 x i8> %16, ptr @v16i8 768 ret void 769} 770 771define void @nonconst_v8i16(i16 signext %a, i16 signext %b, i16 signext %c, i16 signext %d, i16 signext %e, i16 signext %f, i16 signext %g, i16 signext %h) nounwind { 772; O32-LABEL: nonconst_v8i16: 773; O32: # %bb.0: 774; O32-NEXT: lui $2, %hi(_gp_disp) 775; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 776; O32-NEXT: addu $1, $2, $25 777; O32-NEXT: insert.h $w0[0], $4 778; O32-NEXT: insert.h $w0[1], $5 779; O32-NEXT: insert.h $w0[2], $6 780; O32-NEXT: insert.h $w0[3], $7 781; O32-NEXT: lw $2, 16($sp) 782; O32-NEXT: insert.h $w0[4], $2 783; O32-NEXT: lw $2, 20($sp) 784; O32-NEXT: insert.h $w0[5], $2 785; O32-NEXT: lw $1, %got(v8i16)($1) 786; O32-NEXT: lw $2, 28($sp) 787; O32-NEXT: lw $3, 24($sp) 788; O32-NEXT: insert.h $w0[6], $3 789; O32-NEXT: insert.h $w0[7], $2 790; O32-NEXT: jr $ra 791; O32-NEXT: st.h $w0, 0($1) 792; 793; N32-LABEL: nonconst_v8i16: 794; N32: # %bb.0: 795; N32-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v8i16))) 796; N32-NEXT: addu $1, $1, $25 797; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(nonconst_v8i16))) 798; N32-NEXT: insert.h $w0[0], $4 799; N32-NEXT: insert.h $w0[1], $5 800; N32-NEXT: insert.h $w0[2], $6 801; N32-NEXT: insert.h $w0[3], $7 802; N32-NEXT: insert.h $w0[4], $8 803; N32-NEXT: lw $1, %got_disp(v8i16)($1) 804; N32-NEXT: insert.h $w0[5], $9 805; N32-NEXT: insert.h $w0[6], $10 806; N32-NEXT: insert.h $w0[7], $11 807; N32-NEXT: jr $ra 808; N32-NEXT: st.h $w0, 0($1) 809; 810; N64-LABEL: nonconst_v8i16: 811; N64: # %bb.0: 812; N64-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v8i16))) 813; N64-NEXT: daddu $1, $1, $25 814; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(nonconst_v8i16))) 815; N64-NEXT: insert.h $w0[0], $4 816; N64-NEXT: insert.h $w0[1], $5 817; N64-NEXT: insert.h $w0[2], $6 818; N64-NEXT: insert.h $w0[3], $7 819; N64-NEXT: insert.h $w0[4], $8 820; N64-NEXT: ld $1, %got_disp(v8i16)($1) 821; N64-NEXT: insert.h $w0[5], $9 822; N64-NEXT: insert.h $w0[6], $10 823; N64-NEXT: insert.h $w0[7], $11 824; N64-NEXT: jr $ra 825; N64-NEXT: st.h $w0, 0($1) 826 %1 = insertelement <8 x i16> undef, i16 %a, i32 0 827 %2 = insertelement <8 x i16> %1, i16 %b, i32 1 828 %3 = insertelement <8 x i16> %2, i16 %c, i32 2 829 %4 = insertelement <8 x i16> %3, i16 %d, i32 3 830 %5 = insertelement <8 x i16> %4, i16 %e, i32 4 831 %6 = insertelement <8 x i16> %5, i16 %f, i32 5 832 %7 = insertelement <8 x i16> %6, i16 %g, i32 6 833 %8 = insertelement <8 x i16> %7, i16 %h, i32 7 834 store volatile <8 x i16> %8, ptr @v8i16 835 ret void 836} 837 838define void @nonconst_v4i32(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) nounwind { 839; O32-LABEL: nonconst_v4i32: 840; O32: # %bb.0: 841; O32-NEXT: lui $2, %hi(_gp_disp) 842; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 843; O32-NEXT: addu $1, $2, $25 844; O32-NEXT: insert.w $w0[0], $4 845; O32-NEXT: insert.w $w0[1], $5 846; O32-NEXT: insert.w $w0[2], $6 847; O32-NEXT: insert.w $w0[3], $7 848; O32-NEXT: lw $1, %got(v4i32)($1) 849; O32-NEXT: jr $ra 850; O32-NEXT: st.w $w0, 0($1) 851; 852; N32-LABEL: nonconst_v4i32: 853; N32: # %bb.0: 854; N32-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v4i32))) 855; N32-NEXT: addu $1, $1, $25 856; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(nonconst_v4i32))) 857; N32-NEXT: insert.w $w0[0], $4 858; N32-NEXT: insert.w $w0[1], $5 859; N32-NEXT: insert.w $w0[2], $6 860; N32-NEXT: insert.w $w0[3], $7 861; N32-NEXT: lw $1, %got_disp(v4i32)($1) 862; N32-NEXT: jr $ra 863; N32-NEXT: st.w $w0, 0($1) 864; 865; N64-LABEL: nonconst_v4i32: 866; N64: # %bb.0: 867; N64-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v4i32))) 868; N64-NEXT: daddu $1, $1, $25 869; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(nonconst_v4i32))) 870; N64-NEXT: insert.w $w0[0], $4 871; N64-NEXT: insert.w $w0[1], $5 872; N64-NEXT: insert.w $w0[2], $6 873; N64-NEXT: insert.w $w0[3], $7 874; N64-NEXT: ld $1, %got_disp(v4i32)($1) 875; N64-NEXT: jr $ra 876; N64-NEXT: st.w $w0, 0($1) 877 %1 = insertelement <4 x i32> undef, i32 %a, i32 0 878 %2 = insertelement <4 x i32> %1, i32 %b, i32 1 879 %3 = insertelement <4 x i32> %2, i32 %c, i32 2 880 %4 = insertelement <4 x i32> %3, i32 %d, i32 3 881 store volatile <4 x i32> %4, ptr @v4i32 882 ret void 883} 884 885define void @nonconst_v2i64(i64 signext %a, i64 signext %b) nounwind { 886; O32-LABEL: nonconst_v2i64: 887; O32: # %bb.0: 888; O32-NEXT: lui $2, %hi(_gp_disp) 889; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 890; O32-NEXT: addu $1, $2, $25 891; O32-NEXT: insert.w $w0[0], $4 892; O32-NEXT: insert.w $w0[1], $5 893; O32-NEXT: insert.w $w0[2], $6 894; O32-NEXT: insert.w $w0[3], $7 895; O32-NEXT: lw $1, %got(v2i64)($1) 896; O32-NEXT: jr $ra 897; O32-NEXT: st.w $w0, 0($1) 898; 899; N32-LABEL: nonconst_v2i64: 900; N32: # %bb.0: 901; N32-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v2i64))) 902; N32-NEXT: addu $1, $1, $25 903; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(nonconst_v2i64))) 904; N32-NEXT: insert.d $w0[0], $4 905; N32-NEXT: insert.d $w0[1], $5 906; N32-NEXT: lw $1, %got_disp(v2i64)($1) 907; N32-NEXT: jr $ra 908; N32-NEXT: st.d $w0, 0($1) 909; 910; N64-LABEL: nonconst_v2i64: 911; N64: # %bb.0: 912; N64-NEXT: lui $1, %hi(%neg(%gp_rel(nonconst_v2i64))) 913; N64-NEXT: daddu $1, $1, $25 914; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(nonconst_v2i64))) 915; N64-NEXT: insert.d $w0[0], $4 916; N64-NEXT: insert.d $w0[1], $5 917; N64-NEXT: ld $1, %got_disp(v2i64)($1) 918; N64-NEXT: jr $ra 919; N64-NEXT: st.d $w0, 0($1) 920 %1 = insertelement <2 x i64> undef, i64 %a, i32 0 921 %2 = insertelement <2 x i64> %1, i64 %b, i32 1 922 store volatile <2 x i64> %2, ptr @v2i64 923 ret void 924} 925 926define i32 @extract_sext_v16i8() nounwind { 927; O32-LABEL: extract_sext_v16i8: 928; O32: # %bb.0: 929; O32-NEXT: lui $2, %hi(_gp_disp) 930; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 931; O32-NEXT: addu $1, $2, $25 932; O32-NEXT: lw $1, %got(v16i8)($1) 933; O32-NEXT: ld.b $w0, 0($1) 934; O32-NEXT: addv.b $w0, $w0, $w0 935; O32-NEXT: copy_s.b $1, $w0[1] 936; O32-NEXT: jr $ra 937; O32-NEXT: seb $2, $1 938; 939; N32-LABEL: extract_sext_v16i8: 940; N32: # %bb.0: 941; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v16i8))) 942; N32-NEXT: addu $1, $1, $25 943; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v16i8))) 944; N32-NEXT: lw $1, %got_disp(v16i8)($1) 945; N32-NEXT: ld.b $w0, 0($1) 946; N32-NEXT: addv.b $w0, $w0, $w0 947; N32-NEXT: copy_s.b $1, $w0[1] 948; N32-NEXT: jr $ra 949; N32-NEXT: seb $2, $1 950; 951; N64-LABEL: extract_sext_v16i8: 952; N64: # %bb.0: 953; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v16i8))) 954; N64-NEXT: daddu $1, $1, $25 955; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v16i8))) 956; N64-NEXT: ld $1, %got_disp(v16i8)($1) 957; N64-NEXT: ld.b $w0, 0($1) 958; N64-NEXT: addv.b $w0, $w0, $w0 959; N64-NEXT: copy_s.b $1, $w0[1] 960; N64-NEXT: jr $ra 961; N64-NEXT: seb $2, $1 962 %1 = load <16 x i8>, ptr @v16i8 963 %2 = add <16 x i8> %1, %1 964 %3 = extractelement <16 x i8> %2, i32 1 965 %4 = sext i8 %3 to i32 966 ret i32 %4 967} 968 969define i32 @extract_sext_v8i16() nounwind { 970; O32-LABEL: extract_sext_v8i16: 971; O32: # %bb.0: 972; O32-NEXT: lui $2, %hi(_gp_disp) 973; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 974; O32-NEXT: addu $1, $2, $25 975; O32-NEXT: lw $1, %got(v8i16)($1) 976; O32-NEXT: ld.h $w0, 0($1) 977; O32-NEXT: addv.h $w0, $w0, $w0 978; O32-NEXT: copy_s.h $1, $w0[1] 979; O32-NEXT: jr $ra 980; O32-NEXT: seh $2, $1 981; 982; N32-LABEL: extract_sext_v8i16: 983; N32: # %bb.0: 984; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v8i16))) 985; N32-NEXT: addu $1, $1, $25 986; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v8i16))) 987; N32-NEXT: lw $1, %got_disp(v8i16)($1) 988; N32-NEXT: ld.h $w0, 0($1) 989; N32-NEXT: addv.h $w0, $w0, $w0 990; N32-NEXT: copy_s.h $1, $w0[1] 991; N32-NEXT: jr $ra 992; N32-NEXT: seh $2, $1 993; 994; N64-LABEL: extract_sext_v8i16: 995; N64: # %bb.0: 996; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v8i16))) 997; N64-NEXT: daddu $1, $1, $25 998; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v8i16))) 999; N64-NEXT: ld $1, %got_disp(v8i16)($1) 1000; N64-NEXT: ld.h $w0, 0($1) 1001; N64-NEXT: addv.h $w0, $w0, $w0 1002; N64-NEXT: copy_s.h $1, $w0[1] 1003; N64-NEXT: jr $ra 1004; N64-NEXT: seh $2, $1 1005 %1 = load <8 x i16>, ptr @v8i16 1006 %2 = add <8 x i16> %1, %1 1007 %3 = extractelement <8 x i16> %2, i32 1 1008 %4 = sext i16 %3 to i32 1009 ret i32 %4 1010} 1011 1012define i32 @extract_sext_v4i32() nounwind { 1013; O32-LABEL: extract_sext_v4i32: 1014; O32: # %bb.0: 1015; O32-NEXT: lui $2, %hi(_gp_disp) 1016; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1017; O32-NEXT: addu $1, $2, $25 1018; O32-NEXT: lw $1, %got(v4i32)($1) 1019; O32-NEXT: ld.w $w0, 0($1) 1020; O32-NEXT: addv.w $w0, $w0, $w0 1021; O32-NEXT: jr $ra 1022; O32-NEXT: copy_s.w $2, $w0[1] 1023; 1024; N32-LABEL: extract_sext_v4i32: 1025; N32: # %bb.0: 1026; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v4i32))) 1027; N32-NEXT: addu $1, $1, $25 1028; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v4i32))) 1029; N32-NEXT: lw $1, %got_disp(v4i32)($1) 1030; N32-NEXT: ld.w $w0, 0($1) 1031; N32-NEXT: addv.w $w0, $w0, $w0 1032; N32-NEXT: jr $ra 1033; N32-NEXT: copy_s.w $2, $w0[1] 1034; 1035; N64-LABEL: extract_sext_v4i32: 1036; N64: # %bb.0: 1037; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v4i32))) 1038; N64-NEXT: daddu $1, $1, $25 1039; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v4i32))) 1040; N64-NEXT: ld $1, %got_disp(v4i32)($1) 1041; N64-NEXT: ld.w $w0, 0($1) 1042; N64-NEXT: addv.w $w0, $w0, $w0 1043; N64-NEXT: jr $ra 1044; N64-NEXT: copy_s.w $2, $w0[1] 1045 %1 = load <4 x i32>, ptr @v4i32 1046 %2 = add <4 x i32> %1, %1 1047 %3 = extractelement <4 x i32> %2, i32 1 1048 ret i32 %3 1049} 1050 1051define i64 @extract_sext_v2i64() nounwind { 1052; O32-BE-LABEL: extract_sext_v2i64: 1053; O32-BE: # %bb.0: 1054; O32-BE-NEXT: lui $2, %hi(_gp_disp) 1055; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 1056; O32-BE-NEXT: addu $1, $2, $25 1057; O32-BE-NEXT: lw $1, %got(v2i64)($1) 1058; O32-BE-NEXT: ld.d $w0, 0($1) 1059; O32-BE-NEXT: addv.d $w0, $w0, $w0 1060; O32-BE-NEXT: shf.w $w0, $w0, 177 1061; O32-BE-NEXT: copy_s.w $2, $w0[2] 1062; O32-BE-NEXT: jr $ra 1063; O32-BE-NEXT: copy_s.w $3, $w0[3] 1064; 1065; O32-LE-LABEL: extract_sext_v2i64: 1066; O32-LE: # %bb.0: 1067; O32-LE-NEXT: lui $2, %hi(_gp_disp) 1068; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 1069; O32-LE-NEXT: addu $1, $2, $25 1070; O32-LE-NEXT: lw $1, %got(v2i64)($1) 1071; O32-LE-NEXT: ld.d $w0, 0($1) 1072; O32-LE-NEXT: addv.d $w0, $w0, $w0 1073; O32-LE-NEXT: copy_s.w $2, $w0[2] 1074; O32-LE-NEXT: jr $ra 1075; O32-LE-NEXT: copy_s.w $3, $w0[3] 1076; 1077; N32-LABEL: extract_sext_v2i64: 1078; N32: # %bb.0: 1079; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v2i64))) 1080; N32-NEXT: addu $1, $1, $25 1081; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v2i64))) 1082; N32-NEXT: lw $1, %got_disp(v2i64)($1) 1083; N32-NEXT: ld.d $w0, 0($1) 1084; N32-NEXT: addv.d $w0, $w0, $w0 1085; N32-NEXT: jr $ra 1086; N32-NEXT: copy_s.d $2, $w0[1] 1087; 1088; N64-LABEL: extract_sext_v2i64: 1089; N64: # %bb.0: 1090; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v2i64))) 1091; N64-NEXT: daddu $1, $1, $25 1092; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v2i64))) 1093; N64-NEXT: ld $1, %got_disp(v2i64)($1) 1094; N64-NEXT: ld.d $w0, 0($1) 1095; N64-NEXT: addv.d $w0, $w0, $w0 1096; N64-NEXT: jr $ra 1097; N64-NEXT: copy_s.d $2, $w0[1] 1098 %1 = load <2 x i64>, ptr @v2i64 1099 %2 = add <2 x i64> %1, %1 1100 %3 = extractelement <2 x i64> %2, i32 1 1101 ret i64 %3 1102} 1103 1104define i32 @extract_zext_v16i8() nounwind { 1105; O32-LABEL: extract_zext_v16i8: 1106; O32: # %bb.0: 1107; O32-NEXT: lui $2, %hi(_gp_disp) 1108; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1109; O32-NEXT: addu $1, $2, $25 1110; O32-NEXT: lw $1, %got(v16i8)($1) 1111; O32-NEXT: ld.b $w0, 0($1) 1112; O32-NEXT: addv.b $w0, $w0, $w0 1113; O32-NEXT: jr $ra 1114; O32-NEXT: copy_u.b $2, $w0[1] 1115; 1116; N32-LABEL: extract_zext_v16i8: 1117; N32: # %bb.0: 1118; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v16i8))) 1119; N32-NEXT: addu $1, $1, $25 1120; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v16i8))) 1121; N32-NEXT: lw $1, %got_disp(v16i8)($1) 1122; N32-NEXT: ld.b $w0, 0($1) 1123; N32-NEXT: addv.b $w0, $w0, $w0 1124; N32-NEXT: jr $ra 1125; N32-NEXT: copy_u.b $2, $w0[1] 1126; 1127; N64-LABEL: extract_zext_v16i8: 1128; N64: # %bb.0: 1129; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v16i8))) 1130; N64-NEXT: daddu $1, $1, $25 1131; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v16i8))) 1132; N64-NEXT: ld $1, %got_disp(v16i8)($1) 1133; N64-NEXT: ld.b $w0, 0($1) 1134; N64-NEXT: addv.b $w0, $w0, $w0 1135; N64-NEXT: jr $ra 1136; N64-NEXT: copy_u.b $2, $w0[1] 1137 %1 = load <16 x i8>, ptr @v16i8 1138 %2 = add <16 x i8> %1, %1 1139 %3 = extractelement <16 x i8> %2, i32 1 1140 %4 = zext i8 %3 to i32 1141 ret i32 %4 1142} 1143 1144define i32 @extract_zext_v8i16() nounwind { 1145; O32-LABEL: extract_zext_v8i16: 1146; O32: # %bb.0: 1147; O32-NEXT: lui $2, %hi(_gp_disp) 1148; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1149; O32-NEXT: addu $1, $2, $25 1150; O32-NEXT: lw $1, %got(v8i16)($1) 1151; O32-NEXT: ld.h $w0, 0($1) 1152; O32-NEXT: addv.h $w0, $w0, $w0 1153; O32-NEXT: jr $ra 1154; O32-NEXT: copy_u.h $2, $w0[1] 1155; 1156; N32-LABEL: extract_zext_v8i16: 1157; N32: # %bb.0: 1158; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v8i16))) 1159; N32-NEXT: addu $1, $1, $25 1160; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v8i16))) 1161; N32-NEXT: lw $1, %got_disp(v8i16)($1) 1162; N32-NEXT: ld.h $w0, 0($1) 1163; N32-NEXT: addv.h $w0, $w0, $w0 1164; N32-NEXT: jr $ra 1165; N32-NEXT: copy_u.h $2, $w0[1] 1166; 1167; N64-LABEL: extract_zext_v8i16: 1168; N64: # %bb.0: 1169; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v8i16))) 1170; N64-NEXT: daddu $1, $1, $25 1171; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v8i16))) 1172; N64-NEXT: ld $1, %got_disp(v8i16)($1) 1173; N64-NEXT: ld.h $w0, 0($1) 1174; N64-NEXT: addv.h $w0, $w0, $w0 1175; N64-NEXT: jr $ra 1176; N64-NEXT: copy_u.h $2, $w0[1] 1177 %1 = load <8 x i16>, ptr @v8i16 1178 %2 = add <8 x i16> %1, %1 1179 %3 = extractelement <8 x i16> %2, i32 1 1180 %4 = zext i16 %3 to i32 1181 ret i32 %4 1182} 1183 1184define i32 @extract_zext_v4i32() nounwind { 1185; O32-LABEL: extract_zext_v4i32: 1186; O32: # %bb.0: 1187; O32-NEXT: lui $2, %hi(_gp_disp) 1188; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1189; O32-NEXT: addu $1, $2, $25 1190; O32-NEXT: lw $1, %got(v4i32)($1) 1191; O32-NEXT: ld.w $w0, 0($1) 1192; O32-NEXT: addv.w $w0, $w0, $w0 1193; O32-NEXT: jr $ra 1194; O32-NEXT: copy_s.w $2, $w0[1] 1195; 1196; N32-LABEL: extract_zext_v4i32: 1197; N32: # %bb.0: 1198; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v4i32))) 1199; N32-NEXT: addu $1, $1, $25 1200; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v4i32))) 1201; N32-NEXT: lw $1, %got_disp(v4i32)($1) 1202; N32-NEXT: ld.w $w0, 0($1) 1203; N32-NEXT: addv.w $w0, $w0, $w0 1204; N32-NEXT: jr $ra 1205; N32-NEXT: copy_s.w $2, $w0[1] 1206; 1207; N64-LABEL: extract_zext_v4i32: 1208; N64: # %bb.0: 1209; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v4i32))) 1210; N64-NEXT: daddu $1, $1, $25 1211; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v4i32))) 1212; N64-NEXT: ld $1, %got_disp(v4i32)($1) 1213; N64-NEXT: ld.w $w0, 0($1) 1214; N64-NEXT: addv.w $w0, $w0, $w0 1215; N64-NEXT: jr $ra 1216; N64-NEXT: copy_s.w $2, $w0[1] 1217 %1 = load <4 x i32>, ptr @v4i32 1218 %2 = add <4 x i32> %1, %1 1219 %3 = extractelement <4 x i32> %2, i32 1 1220 ret i32 %3 1221} 1222 1223define i64 @extract_zext_v2i64() nounwind { 1224; O32-BE-LABEL: extract_zext_v2i64: 1225; O32-BE: # %bb.0: 1226; O32-BE-NEXT: lui $2, %hi(_gp_disp) 1227; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 1228; O32-BE-NEXT: addu $1, $2, $25 1229; O32-BE-NEXT: lw $1, %got(v2i64)($1) 1230; O32-BE-NEXT: ld.d $w0, 0($1) 1231; O32-BE-NEXT: addv.d $w0, $w0, $w0 1232; O32-BE-NEXT: shf.w $w0, $w0, 177 1233; O32-BE-NEXT: copy_s.w $2, $w0[2] 1234; O32-BE-NEXT: jr $ra 1235; O32-BE-NEXT: copy_s.w $3, $w0[3] 1236; 1237; O32-LE-LABEL: extract_zext_v2i64: 1238; O32-LE: # %bb.0: 1239; O32-LE-NEXT: lui $2, %hi(_gp_disp) 1240; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 1241; O32-LE-NEXT: addu $1, $2, $25 1242; O32-LE-NEXT: lw $1, %got(v2i64)($1) 1243; O32-LE-NEXT: ld.d $w0, 0($1) 1244; O32-LE-NEXT: addv.d $w0, $w0, $w0 1245; O32-LE-NEXT: copy_s.w $2, $w0[2] 1246; O32-LE-NEXT: jr $ra 1247; O32-LE-NEXT: copy_s.w $3, $w0[3] 1248; 1249; N32-LABEL: extract_zext_v2i64: 1250; N32: # %bb.0: 1251; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v2i64))) 1252; N32-NEXT: addu $1, $1, $25 1253; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v2i64))) 1254; N32-NEXT: lw $1, %got_disp(v2i64)($1) 1255; N32-NEXT: ld.d $w0, 0($1) 1256; N32-NEXT: addv.d $w0, $w0, $w0 1257; N32-NEXT: jr $ra 1258; N32-NEXT: copy_s.d $2, $w0[1] 1259; 1260; N64-LABEL: extract_zext_v2i64: 1261; N64: # %bb.0: 1262; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v2i64))) 1263; N64-NEXT: daddu $1, $1, $25 1264; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v2i64))) 1265; N64-NEXT: ld $1, %got_disp(v2i64)($1) 1266; N64-NEXT: ld.d $w0, 0($1) 1267; N64-NEXT: addv.d $w0, $w0, $w0 1268; N64-NEXT: jr $ra 1269; N64-NEXT: copy_s.d $2, $w0[1] 1270 %1 = load <2 x i64>, ptr @v2i64 1271 %2 = add <2 x i64> %1, %1 1272 %3 = extractelement <2 x i64> %2, i32 1 1273 ret i64 %3 1274} 1275 1276define i32 @extract_sext_v16i8_vidx() nounwind { 1277; O32-LABEL: extract_sext_v16i8_vidx: 1278; O32: # %bb.0: 1279; O32-NEXT: lui $2, %hi(_gp_disp) 1280; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1281; O32-NEXT: addu $1, $2, $25 1282; O32-NEXT: lw $2, %got(i32)($1) 1283; O32-NEXT: lw $2, 0($2) 1284; O32-NEXT: lw $1, %got(v16i8)($1) 1285; O32-NEXT: ld.b $w0, 0($1) 1286; O32-NEXT: addv.b $w0, $w0, $w0 1287; O32-NEXT: splat.b $w0, $w0[$2] 1288; O32-NEXT: mfc1 $1, $f0 1289; O32-NEXT: sra $1, $1, 24 1290; O32-NEXT: jr $ra 1291; O32-NEXT: seb $2, $1 1292; 1293; N32-LABEL: extract_sext_v16i8_vidx: 1294; N32: # %bb.0: 1295; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v16i8_vidx))) 1296; N32-NEXT: addu $1, $1, $25 1297; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v16i8_vidx))) 1298; N32-NEXT: lw $2, %got_disp(i32)($1) 1299; N32-NEXT: lw $2, 0($2) 1300; N32-NEXT: lw $1, %got_disp(v16i8)($1) 1301; N32-NEXT: ld.b $w0, 0($1) 1302; N32-NEXT: addv.b $w0, $w0, $w0 1303; N32-NEXT: splat.b $w0, $w0[$2] 1304; N32-NEXT: mfc1 $1, $f0 1305; N32-NEXT: sra $1, $1, 24 1306; N32-NEXT: jr $ra 1307; N32-NEXT: seb $2, $1 1308; 1309; N64-LABEL: extract_sext_v16i8_vidx: 1310; N64: # %bb.0: 1311; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v16i8_vidx))) 1312; N64-NEXT: daddu $1, $1, $25 1313; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v16i8_vidx))) 1314; N64-NEXT: ld $2, %got_disp(v16i8)($1) 1315; N64-NEXT: ld.b $w0, 0($2) 1316; N64-NEXT: addv.b $w0, $w0, $w0 1317; N64-NEXT: ld $1, %got_disp(i32)($1) 1318; N64-NEXT: lwu $1, 0($1) 1319; N64-NEXT: splat.b $w0, $w0[$1] 1320; N64-NEXT: mfc1 $1, $f0 1321; N64-NEXT: sra $1, $1, 24 1322; N64-NEXT: jr $ra 1323; N64-NEXT: seb $2, $1 1324 %1 = load <16 x i8>, ptr @v16i8 1325 %2 = add <16 x i8> %1, %1 1326 %3 = load i32, ptr @i32 1327 %4 = extractelement <16 x i8> %2, i32 %3 1328 %5 = sext i8 %4 to i32 1329 ret i32 %5 1330} 1331 1332define i32 @extract_sext_v8i16_vidx() nounwind { 1333; O32-LABEL: extract_sext_v8i16_vidx: 1334; O32: # %bb.0: 1335; O32-NEXT: lui $2, %hi(_gp_disp) 1336; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1337; O32-NEXT: addu $1, $2, $25 1338; O32-NEXT: lw $2, %got(i32)($1) 1339; O32-NEXT: lw $2, 0($2) 1340; O32-NEXT: lw $1, %got(v8i16)($1) 1341; O32-NEXT: ld.h $w0, 0($1) 1342; O32-NEXT: addv.h $w0, $w0, $w0 1343; O32-NEXT: splat.h $w0, $w0[$2] 1344; O32-NEXT: mfc1 $1, $f0 1345; O32-NEXT: sra $1, $1, 16 1346; O32-NEXT: jr $ra 1347; O32-NEXT: seh $2, $1 1348; 1349; N32-LABEL: extract_sext_v8i16_vidx: 1350; N32: # %bb.0: 1351; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v8i16_vidx))) 1352; N32-NEXT: addu $1, $1, $25 1353; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v8i16_vidx))) 1354; N32-NEXT: lw $2, %got_disp(i32)($1) 1355; N32-NEXT: lw $2, 0($2) 1356; N32-NEXT: lw $1, %got_disp(v8i16)($1) 1357; N32-NEXT: ld.h $w0, 0($1) 1358; N32-NEXT: addv.h $w0, $w0, $w0 1359; N32-NEXT: splat.h $w0, $w0[$2] 1360; N32-NEXT: mfc1 $1, $f0 1361; N32-NEXT: sra $1, $1, 16 1362; N32-NEXT: jr $ra 1363; N32-NEXT: seh $2, $1 1364; 1365; N64-LABEL: extract_sext_v8i16_vidx: 1366; N64: # %bb.0: 1367; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v8i16_vidx))) 1368; N64-NEXT: daddu $1, $1, $25 1369; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v8i16_vidx))) 1370; N64-NEXT: ld $2, %got_disp(v8i16)($1) 1371; N64-NEXT: ld.h $w0, 0($2) 1372; N64-NEXT: addv.h $w0, $w0, $w0 1373; N64-NEXT: ld $1, %got_disp(i32)($1) 1374; N64-NEXT: lwu $1, 0($1) 1375; N64-NEXT: splat.h $w0, $w0[$1] 1376; N64-NEXT: mfc1 $1, $f0 1377; N64-NEXT: sra $1, $1, 16 1378; N64-NEXT: jr $ra 1379; N64-NEXT: seh $2, $1 1380 %1 = load <8 x i16>, ptr @v8i16 1381 %2 = add <8 x i16> %1, %1 1382 %3 = load i32, ptr @i32 1383 %4 = extractelement <8 x i16> %2, i32 %3 1384 %5 = sext i16 %4 to i32 1385 ret i32 %5 1386} 1387 1388define i32 @extract_sext_v4i32_vidx() nounwind { 1389; O32-LABEL: extract_sext_v4i32_vidx: 1390; O32: # %bb.0: 1391; O32-NEXT: lui $2, %hi(_gp_disp) 1392; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1393; O32-NEXT: addu $1, $2, $25 1394; O32-NEXT: lw $2, %got(i32)($1) 1395; O32-NEXT: lw $2, 0($2) 1396; O32-NEXT: lw $1, %got(v4i32)($1) 1397; O32-NEXT: ld.w $w0, 0($1) 1398; O32-NEXT: addv.w $w0, $w0, $w0 1399; O32-NEXT: splat.w $w0, $w0[$2] 1400; O32-NEXT: jr $ra 1401; O32-NEXT: mfc1 $2, $f0 1402; 1403; N32-LABEL: extract_sext_v4i32_vidx: 1404; N32: # %bb.0: 1405; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v4i32_vidx))) 1406; N32-NEXT: addu $1, $1, $25 1407; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v4i32_vidx))) 1408; N32-NEXT: lw $2, %got_disp(i32)($1) 1409; N32-NEXT: lw $2, 0($2) 1410; N32-NEXT: lw $1, %got_disp(v4i32)($1) 1411; N32-NEXT: ld.w $w0, 0($1) 1412; N32-NEXT: addv.w $w0, $w0, $w0 1413; N32-NEXT: splat.w $w0, $w0[$2] 1414; N32-NEXT: jr $ra 1415; N32-NEXT: mfc1 $2, $f0 1416; 1417; N64-LABEL: extract_sext_v4i32_vidx: 1418; N64: # %bb.0: 1419; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v4i32_vidx))) 1420; N64-NEXT: daddu $1, $1, $25 1421; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v4i32_vidx))) 1422; N64-NEXT: ld $2, %got_disp(v4i32)($1) 1423; N64-NEXT: ld.w $w0, 0($2) 1424; N64-NEXT: addv.w $w0, $w0, $w0 1425; N64-NEXT: ld $1, %got_disp(i32)($1) 1426; N64-NEXT: lwu $1, 0($1) 1427; N64-NEXT: splat.w $w0, $w0[$1] 1428; N64-NEXT: jr $ra 1429; N64-NEXT: mfc1 $2, $f0 1430 %1 = load <4 x i32>, ptr @v4i32 1431 %2 = add <4 x i32> %1, %1 1432 %3 = load i32, ptr @i32 1433 %4 = extractelement <4 x i32> %2, i32 %3 1434 ret i32 %4 1435} 1436 1437define i64 @extract_sext_v2i64_vidx() nounwind { 1438; O32-BE-LABEL: extract_sext_v2i64_vidx: 1439; O32-BE: # %bb.0: 1440; O32-BE-NEXT: lui $2, %hi(_gp_disp) 1441; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 1442; O32-BE-NEXT: addu $1, $2, $25 1443; O32-BE-NEXT: lw $2, %got(i32)($1) 1444; O32-BE-NEXT: lw $2, 0($2) 1445; O32-BE-NEXT: addu $2, $2, $2 1446; O32-BE-NEXT: addiu $3, $2, 1 1447; O32-BE-NEXT: lw $1, %got(v2i64)($1) 1448; O32-BE-NEXT: ld.d $w0, 0($1) 1449; O32-BE-NEXT: addv.d $w0, $w0, $w0 1450; O32-BE-NEXT: shf.w $w0, $w0, 177 1451; O32-BE-NEXT: splat.w $w1, $w0[$3] 1452; O32-BE-NEXT: mfc1 $3, $f1 1453; O32-BE-NEXT: splat.w $w0, $w0[$2] 1454; O32-BE-NEXT: jr $ra 1455; O32-BE-NEXT: mfc1 $2, $f0 1456; 1457; O32-LE-LABEL: extract_sext_v2i64_vidx: 1458; O32-LE: # %bb.0: 1459; O32-LE-NEXT: lui $2, %hi(_gp_disp) 1460; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 1461; O32-LE-NEXT: addu $1, $2, $25 1462; O32-LE-NEXT: lw $2, %got(i32)($1) 1463; O32-LE-NEXT: lw $2, 0($2) 1464; O32-LE-NEXT: addu $2, $2, $2 1465; O32-LE-NEXT: addiu $3, $2, 1 1466; O32-LE-NEXT: lw $1, %got(v2i64)($1) 1467; O32-LE-NEXT: ld.d $w0, 0($1) 1468; O32-LE-NEXT: addv.d $w0, $w0, $w0 1469; O32-LE-NEXT: splat.w $w1, $w0[$3] 1470; O32-LE-NEXT: mfc1 $3, $f1 1471; O32-LE-NEXT: splat.w $w0, $w0[$2] 1472; O32-LE-NEXT: jr $ra 1473; O32-LE-NEXT: mfc1 $2, $f0 1474; 1475; N32-LABEL: extract_sext_v2i64_vidx: 1476; N32: # %bb.0: 1477; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v2i64_vidx))) 1478; N32-NEXT: addu $1, $1, $25 1479; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v2i64_vidx))) 1480; N32-NEXT: lw $2, %got_disp(i32)($1) 1481; N32-NEXT: lw $2, 0($2) 1482; N32-NEXT: lw $1, %got_disp(v2i64)($1) 1483; N32-NEXT: ld.d $w0, 0($1) 1484; N32-NEXT: addv.d $w0, $w0, $w0 1485; N32-NEXT: splat.d $w0, $w0[$2] 1486; N32-NEXT: jr $ra 1487; N32-NEXT: dmfc1 $2, $f0 1488; 1489; N64-LABEL: extract_sext_v2i64_vidx: 1490; N64: # %bb.0: 1491; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_sext_v2i64_vidx))) 1492; N64-NEXT: daddu $1, $1, $25 1493; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_sext_v2i64_vidx))) 1494; N64-NEXT: ld $2, %got_disp(v2i64)($1) 1495; N64-NEXT: ld.d $w0, 0($2) 1496; N64-NEXT: addv.d $w0, $w0, $w0 1497; N64-NEXT: ld $1, %got_disp(i32)($1) 1498; N64-NEXT: lwu $1, 0($1) 1499; N64-NEXT: splat.d $w0, $w0[$1] 1500; N64-NEXT: jr $ra 1501; N64-NEXT: dmfc1 $2, $f0 1502 %1 = load <2 x i64>, ptr @v2i64 1503 %2 = add <2 x i64> %1, %1 1504 %3 = load i32, ptr @i32 1505 %4 = extractelement <2 x i64> %2, i32 %3 1506 ret i64 %4 1507} 1508 1509define i32 @extract_zext_v16i8_vidx() nounwind { 1510; O32-LABEL: extract_zext_v16i8_vidx: 1511; O32: # %bb.0: 1512; O32-NEXT: lui $2, %hi(_gp_disp) 1513; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1514; O32-NEXT: addu $1, $2, $25 1515; O32-NEXT: lw $2, %got(i32)($1) 1516; O32-NEXT: lw $2, 0($2) 1517; O32-NEXT: lw $1, %got(v16i8)($1) 1518; O32-NEXT: ld.b $w0, 0($1) 1519; O32-NEXT: addv.b $w0, $w0, $w0 1520; O32-NEXT: splat.b $w0, $w0[$2] 1521; O32-NEXT: mfc1 $1, $f0 1522; O32-NEXT: jr $ra 1523; O32-NEXT: srl $2, $1, 24 1524; 1525; N32-LABEL: extract_zext_v16i8_vidx: 1526; N32: # %bb.0: 1527; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v16i8_vidx))) 1528; N32-NEXT: addu $1, $1, $25 1529; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v16i8_vidx))) 1530; N32-NEXT: lw $2, %got_disp(i32)($1) 1531; N32-NEXT: lw $2, 0($2) 1532; N32-NEXT: lw $1, %got_disp(v16i8)($1) 1533; N32-NEXT: ld.b $w0, 0($1) 1534; N32-NEXT: addv.b $w0, $w0, $w0 1535; N32-NEXT: splat.b $w0, $w0[$2] 1536; N32-NEXT: mfc1 $1, $f0 1537; N32-NEXT: jr $ra 1538; N32-NEXT: srl $2, $1, 24 1539; 1540; N64-LABEL: extract_zext_v16i8_vidx: 1541; N64: # %bb.0: 1542; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v16i8_vidx))) 1543; N64-NEXT: daddu $1, $1, $25 1544; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v16i8_vidx))) 1545; N64-NEXT: ld $2, %got_disp(v16i8)($1) 1546; N64-NEXT: ld.b $w0, 0($2) 1547; N64-NEXT: addv.b $w0, $w0, $w0 1548; N64-NEXT: ld $1, %got_disp(i32)($1) 1549; N64-NEXT: lwu $1, 0($1) 1550; N64-NEXT: splat.b $w0, $w0[$1] 1551; N64-NEXT: mfc1 $1, $f0 1552; N64-NEXT: jr $ra 1553; N64-NEXT: srl $2, $1, 24 1554 %1 = load <16 x i8>, ptr @v16i8 1555 %2 = add <16 x i8> %1, %1 1556 %3 = load i32, ptr @i32 1557 %4 = extractelement <16 x i8> %2, i32 %3 1558 %5 = zext i8 %4 to i32 1559 ret i32 %5 1560} 1561 1562define i32 @extract_zext_v8i16_vidx() nounwind { 1563; O32-LABEL: extract_zext_v8i16_vidx: 1564; O32: # %bb.0: 1565; O32-NEXT: lui $2, %hi(_gp_disp) 1566; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1567; O32-NEXT: addu $1, $2, $25 1568; O32-NEXT: lw $2, %got(i32)($1) 1569; O32-NEXT: lw $2, 0($2) 1570; O32-NEXT: lw $1, %got(v8i16)($1) 1571; O32-NEXT: ld.h $w0, 0($1) 1572; O32-NEXT: addv.h $w0, $w0, $w0 1573; O32-NEXT: splat.h $w0, $w0[$2] 1574; O32-NEXT: mfc1 $1, $f0 1575; O32-NEXT: jr $ra 1576; O32-NEXT: srl $2, $1, 16 1577; 1578; N32-LABEL: extract_zext_v8i16_vidx: 1579; N32: # %bb.0: 1580; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v8i16_vidx))) 1581; N32-NEXT: addu $1, $1, $25 1582; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v8i16_vidx))) 1583; N32-NEXT: lw $2, %got_disp(i32)($1) 1584; N32-NEXT: lw $2, 0($2) 1585; N32-NEXT: lw $1, %got_disp(v8i16)($1) 1586; N32-NEXT: ld.h $w0, 0($1) 1587; N32-NEXT: addv.h $w0, $w0, $w0 1588; N32-NEXT: splat.h $w0, $w0[$2] 1589; N32-NEXT: mfc1 $1, $f0 1590; N32-NEXT: jr $ra 1591; N32-NEXT: srl $2, $1, 16 1592; 1593; N64-LABEL: extract_zext_v8i16_vidx: 1594; N64: # %bb.0: 1595; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v8i16_vidx))) 1596; N64-NEXT: daddu $1, $1, $25 1597; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v8i16_vidx))) 1598; N64-NEXT: ld $2, %got_disp(v8i16)($1) 1599; N64-NEXT: ld.h $w0, 0($2) 1600; N64-NEXT: addv.h $w0, $w0, $w0 1601; N64-NEXT: ld $1, %got_disp(i32)($1) 1602; N64-NEXT: lwu $1, 0($1) 1603; N64-NEXT: splat.h $w0, $w0[$1] 1604; N64-NEXT: mfc1 $1, $f0 1605; N64-NEXT: jr $ra 1606; N64-NEXT: srl $2, $1, 16 1607 %1 = load <8 x i16>, ptr @v8i16 1608 %2 = add <8 x i16> %1, %1 1609 %3 = load i32, ptr @i32 1610 %4 = extractelement <8 x i16> %2, i32 %3 1611 %5 = zext i16 %4 to i32 1612 ret i32 %5 1613} 1614 1615define i32 @extract_zext_v4i32_vidx() nounwind { 1616; O32-LABEL: extract_zext_v4i32_vidx: 1617; O32: # %bb.0: 1618; O32-NEXT: lui $2, %hi(_gp_disp) 1619; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1620; O32-NEXT: addu $1, $2, $25 1621; O32-NEXT: lw $2, %got(i32)($1) 1622; O32-NEXT: lw $2, 0($2) 1623; O32-NEXT: lw $1, %got(v4i32)($1) 1624; O32-NEXT: ld.w $w0, 0($1) 1625; O32-NEXT: addv.w $w0, $w0, $w0 1626; O32-NEXT: splat.w $w0, $w0[$2] 1627; O32-NEXT: jr $ra 1628; O32-NEXT: mfc1 $2, $f0 1629; 1630; N32-LABEL: extract_zext_v4i32_vidx: 1631; N32: # %bb.0: 1632; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v4i32_vidx))) 1633; N32-NEXT: addu $1, $1, $25 1634; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v4i32_vidx))) 1635; N32-NEXT: lw $2, %got_disp(i32)($1) 1636; N32-NEXT: lw $2, 0($2) 1637; N32-NEXT: lw $1, %got_disp(v4i32)($1) 1638; N32-NEXT: ld.w $w0, 0($1) 1639; N32-NEXT: addv.w $w0, $w0, $w0 1640; N32-NEXT: splat.w $w0, $w0[$2] 1641; N32-NEXT: jr $ra 1642; N32-NEXT: mfc1 $2, $f0 1643; 1644; N64-LABEL: extract_zext_v4i32_vidx: 1645; N64: # %bb.0: 1646; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v4i32_vidx))) 1647; N64-NEXT: daddu $1, $1, $25 1648; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v4i32_vidx))) 1649; N64-NEXT: ld $2, %got_disp(v4i32)($1) 1650; N64-NEXT: ld.w $w0, 0($2) 1651; N64-NEXT: addv.w $w0, $w0, $w0 1652; N64-NEXT: ld $1, %got_disp(i32)($1) 1653; N64-NEXT: lwu $1, 0($1) 1654; N64-NEXT: splat.w $w0, $w0[$1] 1655; N64-NEXT: jr $ra 1656; N64-NEXT: mfc1 $2, $f0 1657 %1 = load <4 x i32>, ptr @v4i32 1658 %2 = add <4 x i32> %1, %1 1659 %3 = load i32, ptr @i32 1660 %4 = extractelement <4 x i32> %2, i32 %3 1661 ret i32 %4 1662} 1663 1664define i64 @extract_zext_v2i64_vidx() nounwind { 1665; O32-BE-LABEL: extract_zext_v2i64_vidx: 1666; O32-BE: # %bb.0: 1667; O32-BE-NEXT: lui $2, %hi(_gp_disp) 1668; O32-BE-NEXT: addiu $2, $2, %lo(_gp_disp) 1669; O32-BE-NEXT: addu $1, $2, $25 1670; O32-BE-NEXT: lw $2, %got(i32)($1) 1671; O32-BE-NEXT: lw $2, 0($2) 1672; O32-BE-NEXT: addu $2, $2, $2 1673; O32-BE-NEXT: addiu $3, $2, 1 1674; O32-BE-NEXT: lw $1, %got(v2i64)($1) 1675; O32-BE-NEXT: ld.d $w0, 0($1) 1676; O32-BE-NEXT: addv.d $w0, $w0, $w0 1677; O32-BE-NEXT: shf.w $w0, $w0, 177 1678; O32-BE-NEXT: splat.w $w1, $w0[$3] 1679; O32-BE-NEXT: mfc1 $3, $f1 1680; O32-BE-NEXT: splat.w $w0, $w0[$2] 1681; O32-BE-NEXT: jr $ra 1682; O32-BE-NEXT: mfc1 $2, $f0 1683; 1684; O32-LE-LABEL: extract_zext_v2i64_vidx: 1685; O32-LE: # %bb.0: 1686; O32-LE-NEXT: lui $2, %hi(_gp_disp) 1687; O32-LE-NEXT: addiu $2, $2, %lo(_gp_disp) 1688; O32-LE-NEXT: addu $1, $2, $25 1689; O32-LE-NEXT: lw $2, %got(i32)($1) 1690; O32-LE-NEXT: lw $2, 0($2) 1691; O32-LE-NEXT: addu $2, $2, $2 1692; O32-LE-NEXT: addiu $3, $2, 1 1693; O32-LE-NEXT: lw $1, %got(v2i64)($1) 1694; O32-LE-NEXT: ld.d $w0, 0($1) 1695; O32-LE-NEXT: addv.d $w0, $w0, $w0 1696; O32-LE-NEXT: splat.w $w1, $w0[$3] 1697; O32-LE-NEXT: mfc1 $3, $f1 1698; O32-LE-NEXT: splat.w $w0, $w0[$2] 1699; O32-LE-NEXT: jr $ra 1700; O32-LE-NEXT: mfc1 $2, $f0 1701; 1702; N32-LABEL: extract_zext_v2i64_vidx: 1703; N32: # %bb.0: 1704; N32-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v2i64_vidx))) 1705; N32-NEXT: addu $1, $1, $25 1706; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v2i64_vidx))) 1707; N32-NEXT: lw $2, %got_disp(i32)($1) 1708; N32-NEXT: lw $2, 0($2) 1709; N32-NEXT: lw $1, %got_disp(v2i64)($1) 1710; N32-NEXT: ld.d $w0, 0($1) 1711; N32-NEXT: addv.d $w0, $w0, $w0 1712; N32-NEXT: splat.d $w0, $w0[$2] 1713; N32-NEXT: jr $ra 1714; N32-NEXT: dmfc1 $2, $f0 1715; 1716; N64-LABEL: extract_zext_v2i64_vidx: 1717; N64: # %bb.0: 1718; N64-NEXT: lui $1, %hi(%neg(%gp_rel(extract_zext_v2i64_vidx))) 1719; N64-NEXT: daddu $1, $1, $25 1720; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(extract_zext_v2i64_vidx))) 1721; N64-NEXT: ld $2, %got_disp(v2i64)($1) 1722; N64-NEXT: ld.d $w0, 0($2) 1723; N64-NEXT: addv.d $w0, $w0, $w0 1724; N64-NEXT: ld $1, %got_disp(i32)($1) 1725; N64-NEXT: lwu $1, 0($1) 1726; N64-NEXT: splat.d $w0, $w0[$1] 1727; N64-NEXT: jr $ra 1728; N64-NEXT: dmfc1 $2, $f0 1729 %1 = load <2 x i64>, ptr @v2i64 1730 %2 = add <2 x i64> %1, %1 1731 %3 = load i32, ptr @i32 1732 %4 = extractelement <2 x i64> %2, i32 %3 1733 ret i64 %4 1734} 1735 1736define void @insert_v16i8(i32 signext %a) nounwind { 1737; O32-LABEL: insert_v16i8: 1738; O32: # %bb.0: 1739; O32-NEXT: lui $2, %hi(_gp_disp) 1740; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1741; O32-NEXT: addu $1, $2, $25 1742; O32-NEXT: lw $1, %got(v16i8)($1) 1743; O32-NEXT: jr $ra 1744; O32-NEXT: sb $4, 1($1) 1745; 1746; N32-LABEL: insert_v16i8: 1747; N32: # %bb.0: 1748; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v16i8))) 1749; N32-NEXT: addu $1, $1, $25 1750; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v16i8))) 1751; N32-NEXT: lw $1, %got_disp(v16i8)($1) 1752; N32-NEXT: jr $ra 1753; N32-NEXT: sb $4, 1($1) 1754; 1755; N64-LABEL: insert_v16i8: 1756; N64: # %bb.0: 1757; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v16i8))) 1758; N64-NEXT: daddu $1, $1, $25 1759; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v16i8))) 1760; N64-NEXT: ld $1, %got_disp(v16i8)($1) 1761; N64-NEXT: jr $ra 1762; N64-NEXT: sb $4, 1($1) 1763 %1 = load <16 x i8>, ptr @v16i8 1764 %a2 = trunc i32 %a to i8 1765 %a3 = sext i8 %a2 to i32 1766 %a4 = trunc i32 %a3 to i8 1767 %2 = insertelement <16 x i8> %1, i8 %a4, i32 1 1768 store <16 x i8> %2, ptr @v16i8 1769 ret void 1770} 1771 1772define void @insert_v8i16(i32 signext %a) nounwind { 1773; O32-LABEL: insert_v8i16: 1774; O32: # %bb.0: 1775; O32-NEXT: lui $2, %hi(_gp_disp) 1776; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1777; O32-NEXT: addu $1, $2, $25 1778; O32-NEXT: lw $1, %got(v8i16)($1) 1779; O32-NEXT: jr $ra 1780; O32-NEXT: sh $4, 2($1) 1781; 1782; N32-LABEL: insert_v8i16: 1783; N32: # %bb.0: 1784; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v8i16))) 1785; N32-NEXT: addu $1, $1, $25 1786; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v8i16))) 1787; N32-NEXT: lw $1, %got_disp(v8i16)($1) 1788; N32-NEXT: jr $ra 1789; N32-NEXT: sh $4, 2($1) 1790; 1791; N64-LABEL: insert_v8i16: 1792; N64: # %bb.0: 1793; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v8i16))) 1794; N64-NEXT: daddu $1, $1, $25 1795; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v8i16))) 1796; N64-NEXT: ld $1, %got_disp(v8i16)($1) 1797; N64-NEXT: jr $ra 1798; N64-NEXT: sh $4, 2($1) 1799 %1 = load <8 x i16>, ptr @v8i16 1800 %a2 = trunc i32 %a to i16 1801 %a3 = sext i16 %a2 to i32 1802 %a4 = trunc i32 %a3 to i16 1803 %2 = insertelement <8 x i16> %1, i16 %a4, i32 1 1804 store <8 x i16> %2, ptr @v8i16 1805 ret void 1806} 1807 1808define void @insert_v4i32(i32 signext %a) nounwind { 1809; O32-LABEL: insert_v4i32: 1810; O32: # %bb.0: 1811; O32-NEXT: lui $2, %hi(_gp_disp) 1812; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1813; O32-NEXT: addu $1, $2, $25 1814; O32-NEXT: lw $1, %got(v4i32)($1) 1815; O32-NEXT: jr $ra 1816; O32-NEXT: sw $4, 4($1) 1817; 1818; N32-LABEL: insert_v4i32: 1819; N32: # %bb.0: 1820; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v4i32))) 1821; N32-NEXT: addu $1, $1, $25 1822; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v4i32))) 1823; N32-NEXT: lw $1, %got_disp(v4i32)($1) 1824; N32-NEXT: jr $ra 1825; N32-NEXT: sw $4, 4($1) 1826; 1827; N64-LABEL: insert_v4i32: 1828; N64: # %bb.0: 1829; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v4i32))) 1830; N64-NEXT: daddu $1, $1, $25 1831; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v4i32))) 1832; N64-NEXT: ld $1, %got_disp(v4i32)($1) 1833; N64-NEXT: jr $ra 1834; N64-NEXT: sw $4, 4($1) 1835 %1 = load <4 x i32>, ptr @v4i32 1836 %2 = insertelement <4 x i32> %1, i32 %a, i32 1 1837 store <4 x i32> %2, ptr @v4i32 1838 ret void 1839} 1840define void @insert_v2i64(i64 signext %a) nounwind { 1841; O32-LABEL: insert_v2i64: 1842; O32: # %bb.0: 1843; O32-NEXT: lui $2, %hi(_gp_disp) 1844; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1845; O32-NEXT: addu $1, $2, $25 1846; O32-NEXT: lw $1, %got(v2i64)($1) 1847; O32-NEXT: sw $5, 12($1) 1848; O32-NEXT: jr $ra 1849; O32-NEXT: sw $4, 8($1) 1850; 1851; N32-LABEL: insert_v2i64: 1852; N32: # %bb.0: 1853; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v2i64))) 1854; N32-NEXT: addu $1, $1, $25 1855; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v2i64))) 1856; N32-NEXT: lw $1, %got_disp(v2i64)($1) 1857; N32-NEXT: jr $ra 1858; N32-NEXT: sd $4, 8($1) 1859; 1860; N64-LABEL: insert_v2i64: 1861; N64: # %bb.0: 1862; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v2i64))) 1863; N64-NEXT: daddu $1, $1, $25 1864; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v2i64))) 1865; N64-NEXT: ld $1, %got_disp(v2i64)($1) 1866; N64-NEXT: jr $ra 1867; N64-NEXT: sd $4, 8($1) 1868 %1 = load <2 x i64>, ptr @v2i64 1869 %2 = insertelement <2 x i64> %1, i64 %a, i32 1 1870 store <2 x i64> %2, ptr @v2i64 1871 ret void 1872} 1873 1874define void @insert_v16i8_vidx(i32 signext %a) nounwind { 1875; O32-LABEL: insert_v16i8_vidx: 1876; O32: # %bb.0: 1877; O32-NEXT: lui $2, %hi(_gp_disp) 1878; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1879; O32-NEXT: addu $1, $2, $25 1880; O32-NEXT: lw $2, %got(i32)($1) 1881; O32-NEXT: lw $2, 0($2) 1882; O32-NEXT: andi $2, $2, 15 1883; O32-NEXT: lw $1, %got(v16i8)($1) 1884; O32-NEXT: addu $1, $1, $2 1885; O32-NEXT: jr $ra 1886; O32-NEXT: sb $4, 0($1) 1887; 1888; N32-LABEL: insert_v16i8_vidx: 1889; N32: # %bb.0: 1890; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v16i8_vidx))) 1891; N32-NEXT: addu $1, $1, $25 1892; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v16i8_vidx))) 1893; N32-NEXT: lw $2, %got_disp(i32)($1) 1894; N32-NEXT: lw $2, 0($2) 1895; N32-NEXT: andi $2, $2, 15 1896; N32-NEXT: lw $1, %got_disp(v16i8)($1) 1897; N32-NEXT: addu $1, $1, $2 1898; N32-NEXT: jr $ra 1899; N32-NEXT: sb $4, 0($1) 1900; 1901; N64-LABEL: insert_v16i8_vidx: 1902; N64: # %bb.0: 1903; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v16i8_vidx))) 1904; N64-NEXT: daddu $1, $1, $25 1905; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v16i8_vidx))) 1906; N64-NEXT: ld $2, %got_disp(i32)($1) 1907; N64-NEXT: lw $2, 0($2) 1908; N64-NEXT: andi $2, $2, 15 1909; N64-NEXT: ld $1, %got_disp(v16i8)($1) 1910; N64-NEXT: daddu $1, $1, $2 1911; N64-NEXT: jr $ra 1912; N64-NEXT: sb $4, 0($1) 1913 %1 = load <16 x i8>, ptr @v16i8 1914 %2 = load i32, ptr @i32 1915 %a2 = trunc i32 %a to i8 1916 %a3 = sext i8 %a2 to i32 1917 %a4 = trunc i32 %a3 to i8 1918 %3 = insertelement <16 x i8> %1, i8 %a4, i32 %2 1919 store <16 x i8> %3, ptr @v16i8 1920 ret void 1921} 1922 1923define void @insert_v8i16_vidx(i32 signext %a) nounwind { 1924; O32-LABEL: insert_v8i16_vidx: 1925; O32: # %bb.0: 1926; O32-NEXT: lui $2, %hi(_gp_disp) 1927; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1928; O32-NEXT: addu $1, $2, $25 1929; O32-NEXT: lw $2, %got(i32)($1) 1930; O32-NEXT: lw $2, 0($2) 1931; O32-NEXT: andi $2, $2, 7 1932; O32-NEXT: lw $1, %got(v8i16)($1) 1933; O32-NEXT: lsa $1, $2, $1, 1 1934; O32-NEXT: jr $ra 1935; O32-NEXT: sh $4, 0($1) 1936; 1937; N32-LABEL: insert_v8i16_vidx: 1938; N32: # %bb.0: 1939; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v8i16_vidx))) 1940; N32-NEXT: addu $1, $1, $25 1941; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v8i16_vidx))) 1942; N32-NEXT: lw $2, %got_disp(i32)($1) 1943; N32-NEXT: lw $2, 0($2) 1944; N32-NEXT: andi $2, $2, 7 1945; N32-NEXT: lw $1, %got_disp(v8i16)($1) 1946; N32-NEXT: lsa $1, $2, $1, 1 1947; N32-NEXT: jr $ra 1948; N32-NEXT: sh $4, 0($1) 1949; 1950; N64-LABEL: insert_v8i16_vidx: 1951; N64: # %bb.0: 1952; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v8i16_vidx))) 1953; N64-NEXT: daddu $1, $1, $25 1954; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v8i16_vidx))) 1955; N64-NEXT: ld $2, %got_disp(i32)($1) 1956; N64-NEXT: lw $2, 0($2) 1957; N64-NEXT: andi $2, $2, 7 1958; N64-NEXT: ld $1, %got_disp(v8i16)($1) 1959; N64-NEXT: dlsa $1, $2, $1, 1 1960; N64-NEXT: jr $ra 1961; N64-NEXT: sh $4, 0($1) 1962 %1 = load <8 x i16>, ptr @v8i16 1963 %2 = load i32, ptr @i32 1964 %a2 = trunc i32 %a to i16 1965 %a3 = sext i16 %a2 to i32 1966 %a4 = trunc i32 %a3 to i16 1967 %3 = insertelement <8 x i16> %1, i16 %a4, i32 %2 1968 store <8 x i16> %3, ptr @v8i16 1969 ret void 1970} 1971 1972define void @insert_v4i32_vidx(i32 signext %a) nounwind { 1973; O32-LABEL: insert_v4i32_vidx: 1974; O32: # %bb.0: 1975; O32-NEXT: lui $2, %hi(_gp_disp) 1976; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 1977; O32-NEXT: addu $1, $2, $25 1978; O32-NEXT: lw $2, %got(i32)($1) 1979; O32-NEXT: lw $2, 0($2) 1980; O32-NEXT: andi $2, $2, 3 1981; O32-NEXT: lw $1, %got(v4i32)($1) 1982; O32-NEXT: lsa $1, $2, $1, 2 1983; O32-NEXT: jr $ra 1984; O32-NEXT: sw $4, 0($1) 1985; 1986; N32-LABEL: insert_v4i32_vidx: 1987; N32: # %bb.0: 1988; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v4i32_vidx))) 1989; N32-NEXT: addu $1, $1, $25 1990; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v4i32_vidx))) 1991; N32-NEXT: lw $2, %got_disp(i32)($1) 1992; N32-NEXT: lw $2, 0($2) 1993; N32-NEXT: andi $2, $2, 3 1994; N32-NEXT: lw $1, %got_disp(v4i32)($1) 1995; N32-NEXT: lsa $1, $2, $1, 2 1996; N32-NEXT: jr $ra 1997; N32-NEXT: sw $4, 0($1) 1998; 1999; N64-LABEL: insert_v4i32_vidx: 2000; N64: # %bb.0: 2001; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v4i32_vidx))) 2002; N64-NEXT: daddu $1, $1, $25 2003; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v4i32_vidx))) 2004; N64-NEXT: ld $2, %got_disp(i32)($1) 2005; N64-NEXT: lw $2, 0($2) 2006; N64-NEXT: andi $2, $2, 3 2007; N64-NEXT: ld $1, %got_disp(v4i32)($1) 2008; N64-NEXT: dlsa $1, $2, $1, 2 2009; N64-NEXT: jr $ra 2010; N64-NEXT: sw $4, 0($1) 2011 %1 = load <4 x i32>, ptr @v4i32 2012 %2 = load i32, ptr @i32 2013 %3 = insertelement <4 x i32> %1, i32 %a, i32 %2 2014 store <4 x i32> %3, ptr @v4i32 2015 ret void 2016} 2017 2018; TODO: This code could be a lot better but it works. The legalizer splits 2019; 64-bit inserts into two 32-bit inserts because there is no i64 type on 2020; MIPS32. The obvious optimisation is to perform both insert.w's at once while 2021; the vector is rotated. 2022define void @insert_v2i64_vidx(i64 signext %a) nounwind { 2023; O32-LABEL: insert_v2i64_vidx: 2024; O32: # %bb.0: 2025; O32-NEXT: lui $2, %hi(_gp_disp) 2026; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 2027; O32-NEXT: addu $1, $2, $25 2028; O32-NEXT: lw $2, %got(i32)($1) 2029; O32-NEXT: lw $2, 0($2) 2030; O32-NEXT: andi $2, $2, 1 2031; O32-NEXT: lw $1, %got(v2i64)($1) 2032; O32-NEXT: lsa $1, $2, $1, 3 2033; O32-NEXT: sw $5, 4($1) 2034; O32-NEXT: jr $ra 2035; O32-NEXT: sw $4, 0($1) 2036; 2037; N32-LABEL: insert_v2i64_vidx: 2038; N32: # %bb.0: 2039; N32-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v2i64_vidx))) 2040; N32-NEXT: addu $1, $1, $25 2041; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(insert_v2i64_vidx))) 2042; N32-NEXT: lw $2, %got_disp(i32)($1) 2043; N32-NEXT: lw $2, 0($2) 2044; N32-NEXT: andi $2, $2, 1 2045; N32-NEXT: lw $1, %got_disp(v2i64)($1) 2046; N32-NEXT: lsa $1, $2, $1, 3 2047; N32-NEXT: jr $ra 2048; N32-NEXT: sd $4, 0($1) 2049; 2050; N64-LABEL: insert_v2i64_vidx: 2051; N64: # %bb.0: 2052; N64-NEXT: lui $1, %hi(%neg(%gp_rel(insert_v2i64_vidx))) 2053; N64-NEXT: daddu $1, $1, $25 2054; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(insert_v2i64_vidx))) 2055; N64-NEXT: ld $2, %got_disp(i32)($1) 2056; N64-NEXT: lw $2, 0($2) 2057; N64-NEXT: andi $2, $2, 1 2058; N64-NEXT: ld $1, %got_disp(v2i64)($1) 2059; N64-NEXT: dlsa $1, $2, $1, 3 2060; N64-NEXT: jr $ra 2061; N64-NEXT: sd $4, 0($1) 2062 %1 = load <2 x i64>, ptr @v2i64 2063 %2 = load i32, ptr @i32 2064 %3 = insertelement <2 x i64> %1, i64 %a, i32 %2 2065 store <2 x i64> %3, ptr @v2i64 2066 ret void 2067} 2068 2069; After legalizing shorter vectors with legal element sizes, this test is 2070; no longer called truncstore. 2071define void @store_i8_32bit() nounwind { 2072; O32-LABEL: store_i8_32bit: 2073; O32: # %bb.0: 2074; O32-NEXT: lui $2, %hi(_gp_disp) 2075; O32-NEXT: addiu $2, $2, %lo(_gp_disp) 2076; O32-NEXT: addu $1, $2, $25 2077; O32-NEXT: lw $1, %got(v4i8)($1) 2078; O32-NEXT: addiu $2, $zero, -1 2079; O32-NEXT: jr $ra 2080; O32-NEXT: sw $2, 0($1) 2081; 2082; N32-LABEL: store_i8_32bit: 2083; N32: # %bb.0: 2084; N32-NEXT: lui $1, %hi(%neg(%gp_rel(store_i8_32bit))) 2085; N32-NEXT: addu $1, $1, $25 2086; N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(store_i8_32bit))) 2087; N32-NEXT: lw $1, %got_disp(v4i8)($1) 2088; N32-NEXT: addiu $2, $zero, -1 2089; N32-NEXT: jr $ra 2090; N32-NEXT: sw $2, 0($1) 2091; 2092; N64-LABEL: store_i8_32bit: 2093; N64: # %bb.0: 2094; N64-NEXT: lui $1, %hi(%neg(%gp_rel(store_i8_32bit))) 2095; N64-NEXT: daddu $1, $1, $25 2096; N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(store_i8_32bit))) 2097; N64-NEXT: ld $1, %got_disp(v4i8)($1) 2098; N64-NEXT: addiu $2, $zero, -1 2099; N64-NEXT: jr $ra 2100; N64-NEXT: sw $2, 0($1) 2101 store volatile <4 x i8> <i8 -1, i8 -1, i8 -1, i8 -1>, ptr @v4i8 2102 ret void 2103} 2104