xref: /llvm-project/llvm/test/CodeGen/Mips/llvm-ir/load-atomic.ll (revision ae26f50aea4ef1a6c7058019f0db11a91bbcdade)
1; RUN: llc -mtriple=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL
2; RUN: llc -mtriple=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL
3; RUN: llc -mtriple=mips64 -mcpu=mips64r2 < %s | \
4; RUN:    FileCheck %s -check-prefixes=ALL,M64
5; RUN: llc -mtriple=mips64 -mcpu=mips64r6 < %s | \
6; RUN:    FileCheck %s -check-prefixes=ALL,M64
7
8define i8 @load_i8(ptr %ptr) {
9; ALL-LABEL: load_i8
10
11; ALL: lb $2, 0($4)
12; ALL: sync
13  %val = load atomic i8, ptr %ptr acquire, align 1
14  ret i8 %val
15}
16
17define i16 @load_i16(ptr %ptr) {
18; ALL-LABEL: load_i16
19
20; ALL: lh $2, 0($4)
21; ALL: sync
22  %val = load atomic i16, ptr %ptr acquire, align 2
23  ret i16 %val
24}
25
26define i32 @load_i32(ptr %ptr) {
27; ALL-LABEL: load_i32
28
29; ALL: lw $2, 0($4)
30; ALL: sync
31  %val = load atomic i32, ptr %ptr acquire, align 4
32  ret i32 %val
33}
34
35define i64 @load_i64(ptr %ptr) {
36; M64-LABEL: load_i64
37
38; M64: ld $2, 0($4)
39; M64: sync
40  %val = load atomic i64, ptr %ptr acquire, align 8
41  ret i64 %val
42}
43