1; RUN: llc -mtriple=mips -mcpu=mips32r6 < %s | FileCheck %s --check-prefixes=ALL,R6 2; RUN: llc -mtriple=mips -mcpu=mips64r6 -target-abi=n64 -relocation-model=pic \ 3; RUN: < %s | FileCheck %s --check-prefixes=ALL,R6 4; RUN: llc -mtriple=mips -mcpu=mips32 < %s | FileCheck %s --check-prefixes=ALL,PRER6 5; RUN: llc -mtriple=mips -mcpu=mips64 -target-abi=n64 -relocation-model=pic \ 6; RUN: < %s | FileCheck %s --check-prefixes=ALL,PRER6 7 8 9%struct.anon = type { [63 x i32], i32, i32 } 10 11define i32 @Atomic() { 12; CHECK-LABEL: Atomic: 13entry: 14 %s = alloca %struct.anon, align 4 15 %count = getelementptr inbounds %struct.anon, ptr %s, i64 0, i32 1 16 store i32 0, ptr %count, align 4 17; R6: addiu $[[R0:[0-9a-z]+]], $sp, {{[0-9]+}} 18 19; ALL: #APP 20 21; R6: ll ${{[0-9a-z]+}}, 0($[[R0]]) 22; R6: sc ${{[0-9a-z]+}}, 0($[[R0]]) 23 24; PRER6: ll ${{[0-9a-z]+}}, {{[0-9]+}}(${{[0-9a-z]+}}) 25; PRER6: sc ${{[0-9a-z]+}}, {{[0-9]+}}(${{[0-9a-z]+}}) 26 27; ALL: #NO_APP 28 29 %0 = call { i32, i32 } asm sideeffect ".set push\0A.set noreorder\0A1:\0All $0, $2\0Aaddu $1, $0, $3\0Asc $1, $2\0Abeqz $1, 1b\0Aaddu $1, $0, $3\0A.set pop\0A", "=&r,=&r,=*^ZC,Ir,*^ZC,~{memory},~{$1}"(ptr elementtype(i32) %count, i32 10, ptr elementtype(i32) %count) 30 %asmresult1.i = extractvalue { i32, i32 } %0, 1 31 %cmp = icmp ne i32 %asmresult1.i, 10 32 %conv = zext i1 %cmp to i32 33 %call2 = call i32 @f(i32 signext %conv) 34 ret i32 %call2 35} 36 37declare i32 @f(i32 signext) 38