xref: /llvm-project/llvm/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll (revision 8663926a544602932d299dda435ed1ef70a05f48)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=mips-unknwon-linux-gnu -mcpu=mips32r2 \
3; RUN:   -mattr=+use-indirect-jump-hazard,+long-calls,+noabicalls %s -o - \
4; RUN:   -verify-machineinstrs | FileCheck -check-prefix=O32 %s
5
6; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 -target-abi n32 \
7; RUN:   -mattr=+use-indirect-jump-hazard,+long-calls,+noabicalls %s -o - \
8; RUN:   -verify-machineinstrs | FileCheck -check-prefix=N32 %s
9
10; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 -target-abi n64 \
11; RUN:   -mattr=+use-indirect-jump-hazard,+long-calls,+noabicalls %s -o - \
12; RUN:   -verify-machineinstrs | FileCheck -check-prefix=N64 %s
13
14declare void @callee()
15declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1)
16
17@val = internal unnamed_addr global [20 x i32] zeroinitializer, align 4
18
19; Test that the long call sequence uses the hazard barrier instruction variant.
20define void @caller() {
21; O32-LABEL: caller:
22; O32:       # %bb.0:
23; O32-NEXT:    addiu $sp, $sp, -24
24; O32-NEXT:    .cfi_def_cfa_offset 24
25; O32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
26; O32-NEXT:    .cfi_offset 31, -4
27; O32-NEXT:    lui $1, %hi(callee)
28; O32-NEXT:    addiu $25, $1, %lo(callee)
29; O32-NEXT:    jalr.hb $25
30; O32-NEXT:    nop
31; O32-NEXT:    lui $1, %hi(val)
32; O32-NEXT:    addiu $4, $1, %lo(val)
33; O32-NEXT:    lui $1, %hi(memset)
34; O32-NEXT:    addiu $25, $1, %lo(memset)
35; O32-NEXT:    addiu $5, $zero, 0
36; O32-NEXT:    jalr.hb $25
37; O32-NEXT:    addiu $6, $zero, 80
38; O32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
39; O32-NEXT:    jr $ra
40; O32-NEXT:    addiu $sp, $sp, 24
41;
42; N32-LABEL: caller:
43; N32:       # %bb.0:
44; N32-NEXT:    addiu $sp, $sp, -16
45; N32-NEXT:    .cfi_def_cfa_offset 16
46; N32-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
47; N32-NEXT:    .cfi_offset 31, -8
48; N32-NEXT:    lui $1, %hi(callee)
49; N32-NEXT:    addiu $25, $1, %lo(callee)
50; N32-NEXT:    jalr.hb $25
51; N32-NEXT:    nop
52; N32-NEXT:    lui $1, %hi(val)
53; N32-NEXT:    addiu $4, $1, %lo(val)
54; N32-NEXT:    lui $1, %hi(memset)
55; N32-NEXT:    addiu $25, $1, %lo(memset)
56; N32-NEXT:    daddiu $5, $zero, 0
57; N32-NEXT:    jalr.hb $25
58; N32-NEXT:    daddiu $6, $zero, 80
59; N32-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
60; N32-NEXT:    jr $ra
61; N32-NEXT:    addiu $sp, $sp, 16
62;
63; N64-LABEL: caller:
64; N64:       # %bb.0:
65; N64-NEXT:    daddiu $sp, $sp, -16
66; N64-NEXT:    .cfi_def_cfa_offset 16
67; N64-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
68; N64-NEXT:    .cfi_offset 31, -8
69; N64-NEXT:    lui $1, %highest(callee)
70; N64-NEXT:    daddiu $1, $1, %higher(callee)
71; N64-NEXT:    dsll $1, $1, 16
72; N64-NEXT:    daddiu $1, $1, %hi(callee)
73; N64-NEXT:    dsll $1, $1, 16
74; N64-NEXT:    daddiu $25, $1, %lo(callee)
75; N64-NEXT:    jalr.hb $25
76; N64-NEXT:    nop
77; N64-NEXT:    lui $1, %highest(val)
78; N64-NEXT:    daddiu $1, $1, %higher(val)
79; N64-NEXT:    dsll $1, $1, 16
80; N64-NEXT:    daddiu $1, $1, %hi(val)
81; N64-NEXT:    dsll $1, $1, 16
82; N64-NEXT:    lui $2, %highest(memset)
83; N64-NEXT:    daddiu $4, $1, %lo(val)
84; N64-NEXT:    daddiu $1, $2, %higher(memset)
85; N64-NEXT:    dsll $1, $1, 16
86; N64-NEXT:    daddiu $1, $1, %hi(memset)
87; N64-NEXT:    dsll $1, $1, 16
88; N64-NEXT:    daddiu $25, $1, %lo(memset)
89; N64-NEXT:    daddiu $5, $zero, 0
90; N64-NEXT:    jalr.hb $25
91; N64-NEXT:    daddiu $6, $zero, 80
92; N64-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
93; N64-NEXT:    jr $ra
94; N64-NEXT:    daddiu $sp, $sp, 16
95  call void @callee()
96  call void @llvm.memset.p0.i32(ptr align 4 @val, i8 0, i32 80, i1 false)
97  ret  void
98}
99
100