1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; Except for the NACL version which isn't parsed by update_llc_test_checks.py 3 4; RUN: llc -mtriple=mipsel-unknown-linux-gnu -force-mips-long-branch -O3 \ 5; RUN: -mcpu=mips32r2 -mattr=+use-indirect-jump-hazard -relocation-model=pic \ 6; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=O32-PIC 7 8; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 \ 9; RUN: -force-mips-long-branch -O3 -mattr=+use-indirect-jump-hazard \ 10; RUN: -relocation-model=pic -verify-machineinstrs < %s \ 11; RUN: | FileCheck %s -check-prefix=O32-R6-PIC 12 13; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64r2 -target-abi=n64 \ 14; RUN: -force-mips-long-branch -O3 -relocation-model=pic \ 15; RUN: -mattr=+use-indirect-jump-hazard -verify-machineinstrs \ 16; RUN: < %s | FileCheck %s -check-prefix=MIPS64 17 18; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64r6 -target-abi=n64 \ 19; RUN: -force-mips-long-branch -O3 -mattr=+use-indirect-jump-hazard \ 20; RUN: -relocation-model=pic -verify-machineinstrs < %s \ 21; RUN: | FileCheck %s -check-prefix=N64-R6 22 23; Test that the long branches also get changed to their hazard variants. 24 25@x = external global i32 26 27define void @test1(i32 signext %s) { 28; O32-PIC-LABEL: test1: 29; O32-PIC: # %bb.0: # %entry 30; O32-PIC-NEXT: lui $2, %hi(_gp_disp) 31; O32-PIC-NEXT: addiu $2, $2, %lo(_gp_disp) 32; O32-PIC-NEXT: bnez $4, $BB0_3 33; O32-PIC-NEXT: addu $2, $2, $25 34; O32-PIC-NEXT: # %bb.1: # %entry 35; O32-PIC-NEXT: addiu $sp, $sp, -8 36; O32-PIC-NEXT: sw $ra, 0($sp) 37; O32-PIC-NEXT: lui $1, %hi(($BB0_4)-($BB0_2)) 38; O32-PIC-NEXT: bal $BB0_2 39; O32-PIC-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2)) 40; O32-PIC-NEXT: $BB0_2: # %entry 41; O32-PIC-NEXT: addu $1, $ra, $1 42; O32-PIC-NEXT: lw $ra, 0($sp) 43; O32-PIC-NEXT: jr.hb $1 44; O32-PIC-NEXT: addiu $sp, $sp, 8 45; O32-PIC-NEXT: $BB0_3: # %then 46; O32-PIC-NEXT: lw $1, %got(x)($2) 47; O32-PIC-NEXT: addiu $2, $zero, 1 48; O32-PIC-NEXT: sw $2, 0($1) 49; O32-PIC-NEXT: $BB0_4: # %end 50; O32-PIC-NEXT: jr $ra 51; O32-PIC-NEXT: nop 52; 53; O32-R6-PIC-LABEL: test1: 54; O32-R6-PIC: # %bb.0: # %entry 55; O32-R6-PIC-NEXT: lui $2, %hi(_gp_disp) 56; O32-R6-PIC-NEXT: addiu $2, $2, %lo(_gp_disp) 57; O32-R6-PIC-NEXT: bnez $4, $BB0_3 58; O32-R6-PIC-NEXT: addu $2, $2, $25 59; O32-R6-PIC-NEXT: # %bb.1: # %entry 60; O32-R6-PIC-NEXT: addiu $sp, $sp, -8 61; O32-R6-PIC-NEXT: sw $ra, 0($sp) 62; O32-R6-PIC-NEXT: lui $1, %hi(($BB0_4)-($BB0_2)) 63; O32-R6-PIC-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2)) 64; O32-R6-PIC-NEXT: balc $BB0_2 65; O32-R6-PIC-NEXT: $BB0_2: # %entry 66; O32-R6-PIC-NEXT: addu $1, $ra, $1 67; O32-R6-PIC-NEXT: lw $ra, 0($sp) 68; O32-R6-PIC-NEXT: jr.hb $1 69; O32-R6-PIC-NEXT: addiu $sp, $sp, 8 70; O32-R6-PIC-NEXT: $BB0_3: # %then 71; O32-R6-PIC-NEXT: lw $1, %got(x)($2) 72; O32-R6-PIC-NEXT: addiu $2, $zero, 1 73; O32-R6-PIC-NEXT: sw $2, 0($1) 74; O32-R6-PIC-NEXT: $BB0_4: # %end 75; O32-R6-PIC-NEXT: jrc $ra 76; 77; MIPS64-LABEL: test1: 78; MIPS64: # %bb.0: # %entry 79; MIPS64-NEXT: lui $1, %hi(%neg(%gp_rel(test1))) 80; MIPS64-NEXT: bnez $4, .LBB0_3 81; MIPS64-NEXT: daddu $2, $1, $25 82; MIPS64-NEXT: # %bb.1: # %entry 83; MIPS64-NEXT: daddiu $sp, $sp, -16 84; MIPS64-NEXT: sd $ra, 0($sp) 85; MIPS64-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2) 86; MIPS64-NEXT: dsll $1, $1, 16 87; MIPS64-NEXT: bal .LBB0_2 88; MIPS64-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2) 89; MIPS64-NEXT: .LBB0_2: # %entry 90; MIPS64-NEXT: daddu $1, $ra, $1 91; MIPS64-NEXT: ld $ra, 0($sp) 92; MIPS64-NEXT: jr.hb $1 93; MIPS64-NEXT: daddiu $sp, $sp, 16 94; MIPS64-NEXT: .LBB0_3: # %then 95; MIPS64-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(test1))) 96; MIPS64-NEXT: addiu $2, $zero, 1 97; MIPS64-NEXT: ld $1, %got_disp(x)($1) 98; MIPS64-NEXT: sw $2, 0($1) 99; MIPS64-NEXT: .LBB0_4: # %end 100; MIPS64-NEXT: jr $ra 101; MIPS64-NEXT: nop 102; 103; N64-R6-LABEL: test1: 104; N64-R6: # %bb.0: # %entry 105; N64-R6-NEXT: lui $1, %hi(%neg(%gp_rel(test1))) 106; N64-R6-NEXT: bnez $4, .LBB0_3 107; N64-R6-NEXT: daddu $2, $1, $25 108; N64-R6-NEXT: # %bb.1: # %entry 109; N64-R6-NEXT: daddiu $sp, $sp, -16 110; N64-R6-NEXT: sd $ra, 0($sp) 111; N64-R6-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2) 112; N64-R6-NEXT: dsll $1, $1, 16 113; N64-R6-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2) 114; N64-R6-NEXT: balc .LBB0_2 115; N64-R6-NEXT: .LBB0_2: # %entry 116; N64-R6-NEXT: daddu $1, $ra, $1 117; N64-R6-NEXT: ld $ra, 0($sp) 118; N64-R6-NEXT: jr.hb $1 119; N64-R6-NEXT: daddiu $sp, $sp, 16 120; N64-R6-NEXT: .LBB0_3: # %then 121; N64-R6-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(test1))) 122; N64-R6-NEXT: addiu $2, $zero, 1 123; N64-R6-NEXT: ld $1, %got_disp(x)($1) 124; N64-R6-NEXT: sw $2, 0($1) 125; N64-R6-NEXT: .LBB0_4: # %end 126; N64-R6-NEXT: jrc $ra 127entry: 128 %cmp = icmp eq i32 %s, 0 129 br i1 %cmp, label %end, label %then 130 131then: 132 store i32 1, ptr @x, align 4 133 br label %end 134 135end: 136 ret void 137 138} 139