1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=mipsel-mti-linux-gnu < %s | FileCheck %s -check-prefix=MIPS32 3; RUN: llc -mtriple=mips64el-mti-linux-gnu < %s | FileCheck %s -check-prefix=MIPS64 4 5 6define i32 @mul5_32(i32 signext %a) { 7; MIPS32-LABEL: mul5_32: 8; MIPS32: # %bb.0: # %entry 9; MIPS32-NEXT: sll $1, $4, 2 10; MIPS32-NEXT: jr $ra 11; MIPS32-NEXT: addu $2, $1, $4 12; 13; MIPS64-LABEL: mul5_32: 14; MIPS64: # %bb.0: # %entry 15; MIPS64-NEXT: sll $1, $4, 2 16; MIPS64-NEXT: jr $ra 17; MIPS64-NEXT: addu $2, $1, $4 18entry: 19 %mul = mul nsw i32 %a, 5 20 ret i32 %mul 21} 22 23define i32 @mul27_32(i32 signext %a) { 24; MIPS32-LABEL: mul27_32: 25; MIPS32: # %bb.0: # %entry 26; MIPS32-NEXT: sll $1, $4, 2 27; MIPS32-NEXT: addu $1, $1, $4 28; MIPS32-NEXT: sll $2, $4, 5 29; MIPS32-NEXT: jr $ra 30; MIPS32-NEXT: subu $2, $2, $1 31; 32; MIPS64-LABEL: mul27_32: 33; MIPS64: # %bb.0: # %entry 34; MIPS64-NEXT: sll $1, $4, 2 35; MIPS64-NEXT: addu $1, $1, $4 36; MIPS64-NEXT: sll $2, $4, 5 37; MIPS64-NEXT: jr $ra 38; MIPS64-NEXT: subu $2, $2, $1 39entry: 40 %mul = mul nsw i32 %a, 27 41 ret i32 %mul 42} 43 44define i32 @muln2147483643_32(i32 signext %a) { 45; MIPS32-LABEL: muln2147483643_32: 46; MIPS32: # %bb.0: # %entry 47; MIPS32-NEXT: sll $1, $4, 2 48; MIPS32-NEXT: addu $1, $1, $4 49; MIPS32-NEXT: sll $2, $4, 31 50; MIPS32-NEXT: jr $ra 51; MIPS32-NEXT: addu $2, $2, $1 52; 53; MIPS64-LABEL: muln2147483643_32: 54; MIPS64: # %bb.0: # %entry 55; MIPS64-NEXT: sll $1, $4, 2 56; MIPS64-NEXT: addu $1, $1, $4 57; MIPS64-NEXT: sll $2, $4, 31 58; MIPS64-NEXT: jr $ra 59; MIPS64-NEXT: addu $2, $2, $1 60entry: 61 %mul = mul nsw i32 %a, -2147483643 62 ret i32 %mul 63} 64 65define i64 @muln9223372036854775805_64(i64 signext %a) { 66; MIPS32-LABEL: muln9223372036854775805_64: 67; MIPS32: # %bb.0: # %entry 68; MIPS32-NEXT: sll $1, $4, 1 69; MIPS32-NEXT: addu $2, $1, $4 70; MIPS32-NEXT: sltu $1, $2, $1 71; MIPS32-NEXT: srl $3, $4, 31 72; MIPS32-NEXT: sll $6, $5, 1 73; MIPS32-NEXT: or $3, $6, $3 74; MIPS32-NEXT: addu $3, $3, $5 75; MIPS32-NEXT: addu $1, $3, $1 76; MIPS32-NEXT: sll $3, $4, 31 77; MIPS32-NEXT: jr $ra 78; MIPS32-NEXT: addu $3, $3, $1 79; 80; MIPS64-LABEL: muln9223372036854775805_64: 81; MIPS64: # %bb.0: # %entry 82; MIPS64-NEXT: dsll $1, $4, 1 83; MIPS64-NEXT: daddu $1, $1, $4 84; MIPS64-NEXT: dsll $2, $4, 63 85; MIPS64-NEXT: jr $ra 86; MIPS64-NEXT: daddu $2, $2, $1 87entry: 88 %mul = mul nsw i64 %a, -9223372036854775805 89 ret i64 %mul 90} 91 92define i128 @muln170141183460469231731687303715884105725_128(i128 signext %a) { 93; MIPS32-LABEL: muln170141183460469231731687303715884105725_128: 94; MIPS32: # %bb.0: # %entry 95; MIPS32-NEXT: sll $1, $4, 1 96; MIPS32-NEXT: addu $2, $1, $4 97; MIPS32-NEXT: sltu $1, $2, $1 98; MIPS32-NEXT: srl $3, $4, 31 99; MIPS32-NEXT: sll $8, $5, 1 100; MIPS32-NEXT: or $8, $8, $3 101; MIPS32-NEXT: addu $3, $8, $5 102; MIPS32-NEXT: addu $3, $3, $1 103; MIPS32-NEXT: sltu $9, $3, $8 104; MIPS32-NEXT: xor $8, $3, $8 105; MIPS32-NEXT: movz $9, $1, $8 106; MIPS32-NEXT: srl $1, $5, 31 107; MIPS32-NEXT: sll $5, $6, 1 108; MIPS32-NEXT: or $5, $5, $1 109; MIPS32-NEXT: addu $8, $5, $6 110; MIPS32-NEXT: addu $1, $8, $9 111; MIPS32-NEXT: sltu $5, $8, $5 112; MIPS32-NEXT: srl $6, $6, 31 113; MIPS32-NEXT: sll $9, $7, 1 114; MIPS32-NEXT: or $6, $9, $6 115; MIPS32-NEXT: addu $6, $6, $7 116; MIPS32-NEXT: addu $5, $6, $5 117; MIPS32-NEXT: sll $4, $4, 31 118; MIPS32-NEXT: sltu $6, $1, $8 119; MIPS32-NEXT: addu $5, $5, $6 120; MIPS32-NEXT: addu $5, $4, $5 121; MIPS32-NEXT: jr $ra 122; MIPS32-NEXT: move $4, $1 123; 124; MIPS64-LABEL: muln170141183460469231731687303715884105725_128: 125; MIPS64: # %bb.0: # %entry 126; MIPS64-NEXT: dsrl $1, $4, 63 127; MIPS64-NEXT: dsll $2, $5, 1 128; MIPS64-NEXT: or $1, $2, $1 129; MIPS64-NEXT: daddu $1, $1, $5 130; MIPS64-NEXT: dsll $3, $4, 1 131; MIPS64-NEXT: daddu $2, $3, $4 132; MIPS64-NEXT: sltu $3, $2, $3 133; MIPS64-NEXT: dsll $3, $3, 32 134; MIPS64-NEXT: dsrl $3, $3, 32 135; MIPS64-NEXT: daddu $1, $1, $3 136; MIPS64-NEXT: dsll $3, $4, 63 137; MIPS64-NEXT: jr $ra 138; MIPS64-NEXT: daddu $3, $3, $1 139entry: 140 %mul = mul nsw i128 %a, -170141183460469231731687303715884105725 141 ret i128 %mul 142} 143 144define i128 @mul170141183460469231731687303715884105723_128(i128 signext %a) { 145; MIPS32-LABEL: mul170141183460469231731687303715884105723_128: 146; MIPS32: # %bb.0: # %entry 147; MIPS32-NEXT: sll $1, $4, 2 148; MIPS32-NEXT: addu $2, $1, $4 149; MIPS32-NEXT: sltu $1, $2, $1 150; MIPS32-NEXT: srl $3, $4, 30 151; MIPS32-NEXT: sll $8, $5, 2 152; MIPS32-NEXT: or $3, $8, $3 153; MIPS32-NEXT: addu $8, $3, $5 154; MIPS32-NEXT: addu $8, $8, $1 155; MIPS32-NEXT: sltu $9, $8, $3 156; MIPS32-NEXT: xor $3, $8, $3 157; MIPS32-NEXT: sltu $10, $zero, $8 158; MIPS32-NEXT: sltu $11, $zero, $2 159; MIPS32-NEXT: movz $10, $11, $8 160; MIPS32-NEXT: movz $9, $1, $3 161; MIPS32-NEXT: srl $1, $5, 30 162; MIPS32-NEXT: sll $3, $6, 2 163; MIPS32-NEXT: or $1, $3, $1 164; MIPS32-NEXT: addu $3, $1, $6 165; MIPS32-NEXT: addu $5, $3, $9 166; MIPS32-NEXT: sll $4, $4, 31 167; MIPS32-NEXT: negu $9, $5 168; MIPS32-NEXT: sltu $12, $9, $10 169; MIPS32-NEXT: sltu $13, $5, $3 170; MIPS32-NEXT: sltu $1, $3, $1 171; MIPS32-NEXT: srl $3, $6, 30 172; MIPS32-NEXT: sll $6, $7, 2 173; MIPS32-NEXT: or $3, $6, $3 174; MIPS32-NEXT: addu $3, $3, $7 175; MIPS32-NEXT: addu $1, $3, $1 176; MIPS32-NEXT: addu $1, $1, $13 177; MIPS32-NEXT: subu $1, $4, $1 178; MIPS32-NEXT: sltu $3, $zero, $5 179; MIPS32-NEXT: subu $1, $1, $3 180; MIPS32-NEXT: subu $5, $1, $12 181; MIPS32-NEXT: subu $4, $9, $10 182; MIPS32-NEXT: addu $1, $8, $11 183; MIPS32-NEXT: negu $3, $1 184; MIPS32-NEXT: jr $ra 185; MIPS32-NEXT: negu $2, $2 186; 187; MIPS64-LABEL: mul170141183460469231731687303715884105723_128: 188; MIPS64: # %bb.0: # %entry 189; MIPS64-NEXT: dsrl $1, $4, 62 190; MIPS64-NEXT: dsll $2, $5, 2 191; MIPS64-NEXT: or $1, $2, $1 192; MIPS64-NEXT: daddu $1, $1, $5 193; MIPS64-NEXT: dsll $2, $4, 2 194; MIPS64-NEXT: daddu $5, $2, $4 195; MIPS64-NEXT: sltu $2, $5, $2 196; MIPS64-NEXT: dsll $2, $2, 32 197; MIPS64-NEXT: dsrl $2, $2, 32 198; MIPS64-NEXT: daddu $1, $1, $2 199; MIPS64-NEXT: dsll $2, $4, 63 200; MIPS64-NEXT: dsubu $1, $2, $1 201; MIPS64-NEXT: sltu $2, $zero, $5 202; MIPS64-NEXT: dsll $2, $2, 32 203; MIPS64-NEXT: dsrl $2, $2, 32 204; MIPS64-NEXT: dsubu $3, $1, $2 205; MIPS64-NEXT: jr $ra 206; MIPS64-NEXT: dnegu $2, $5 207entry: 208 %mul = mul nsw i128 %a, 170141183460469231731687303715884105723 209 ret i128 %mul 210} 211 212define i32 @mul42949673_32(i32 %a) { 213; MIPS32-LABEL: mul42949673_32: 214; MIPS32: # %bb.0: 215; MIPS32-NEXT: lui $1, 655 216; MIPS32-NEXT: ori $1, $1, 23593 217; MIPS32-NEXT: jr $ra 218; MIPS32-NEXT: mul $2, $4, $1 219; 220; MIPS64-LABEL: mul42949673_32: 221; MIPS64: # %bb.0: 222; MIPS64-NEXT: lui $1, 655 223; MIPS64-NEXT: ori $1, $1, 23593 224; MIPS64-NEXT: sll $2, $4, 0 225; MIPS64-NEXT: jr $ra 226; MIPS64-NEXT: mul $2, $2, $1 227 %b = mul i32 %a, 42949673 228 ret i32 %b 229} 230 231define i64 @mul42949673_64(i64 %a) { 232; MIPS32-LABEL: mul42949673_64: 233; MIPS32: # %bb.0: # %entry 234; MIPS32-NEXT: lui $1, 655 235; MIPS32-NEXT: ori $1, $1, 23593 236; MIPS32-NEXT: multu $4, $1 237; MIPS32-NEXT: mflo $2 238; MIPS32-NEXT: mfhi $3 239; MIPS32-NEXT: mul $1, $5, $1 240; MIPS32-NEXT: jr $ra 241; MIPS32-NEXT: addu $3, $3, $1 242; 243; MIPS64-LABEL: mul42949673_64: 244; MIPS64: # %bb.0: # %entry 245; MIPS64-NEXT: lui $1, 655 246; MIPS64-NEXT: ori $1, $1, 23593 247; MIPS64-NEXT: dmult $4, $1 248; MIPS64-NEXT: jr $ra 249; MIPS64-NEXT: mflo $2 250entry: 251 %b = mul i64 %a, 42949673 252 ret i64 %b 253} 254 255define i32 @mul22224078_32(i32 %a) { 256; MIPS32-LABEL: mul22224078_32: 257; MIPS32: # %bb.0: # %entry 258; MIPS32-NEXT: lui $1, 339 259; MIPS32-NEXT: ori $1, $1, 7374 260; MIPS32-NEXT: jr $ra 261; MIPS32-NEXT: mul $2, $4, $1 262; 263; MIPS64-LABEL: mul22224078_32: 264; MIPS64: # %bb.0: # %entry 265; MIPS64-NEXT: lui $1, 339 266; MIPS64-NEXT: ori $1, $1, 7374 267; MIPS64-NEXT: sll $2, $4, 0 268; MIPS64-NEXT: jr $ra 269; MIPS64-NEXT: mul $2, $2, $1 270entry: 271 %b = mul i32 %a, 22224078 272 ret i32 %b 273} 274 275define i64 @mul22224078_64(i64 %a) { 276; MIPS32-LABEL: mul22224078_64: 277; MIPS32: # %bb.0: # %entry 278; MIPS32-NEXT: lui $1, 339 279; MIPS32-NEXT: ori $1, $1, 7374 280; MIPS32-NEXT: multu $4, $1 281; MIPS32-NEXT: mflo $2 282; MIPS32-NEXT: mfhi $3 283; MIPS32-NEXT: mul $1, $5, $1 284; MIPS32-NEXT: jr $ra 285; MIPS32-NEXT: addu $3, $3, $1 286; 287; MIPS64-LABEL: mul22224078_64: 288; MIPS64: # %bb.0: # %entry 289; MIPS64-NEXT: lui $1, 339 290; MIPS64-NEXT: ori $1, $1, 7374 291; MIPS64-NEXT: dmult $4, $1 292; MIPS64-NEXT: jr $ra 293; MIPS64-NEXT: mflo $2 294entry: 295 %b = mul i64 %a, 22224078 296 ret i64 %b 297} 298 299define i32 @mul22245375_32(i32 %a) { 300; MIPS32-LABEL: mul22245375_32: 301; MIPS32: # %bb.0: # %entry 302; MIPS32-NEXT: lui $1, 339 303; MIPS32-NEXT: ori $1, $1, 28671 304; MIPS32-NEXT: jr $ra 305; MIPS32-NEXT: mul $2, $4, $1 306; 307; MIPS64-LABEL: mul22245375_32: 308; MIPS64: # %bb.0: # %entry 309; MIPS64-NEXT: lui $1, 339 310; MIPS64-NEXT: ori $1, $1, 28671 311; MIPS64-NEXT: sll $2, $4, 0 312; MIPS64-NEXT: jr $ra 313; MIPS64-NEXT: mul $2, $2, $1 314entry: 315 %b = mul i32 %a, 22245375 316 ret i32 %b 317} 318 319define i64 @mul22245375_64(i64 %a) { 320; MIPS32-LABEL: mul22245375_64: 321; MIPS32: # %bb.0: # %entry 322; MIPS32-NEXT: lui $1, 339 323; MIPS32-NEXT: ori $1, $1, 28671 324; MIPS32-NEXT: multu $4, $1 325; MIPS32-NEXT: mflo $2 326; MIPS32-NEXT: mfhi $3 327; MIPS32-NEXT: mul $1, $5, $1 328; MIPS32-NEXT: jr $ra 329; MIPS32-NEXT: addu $3, $3, $1 330; 331; MIPS64-LABEL: mul22245375_64: 332; MIPS64: # %bb.0: # %entry 333; MIPS64-NEXT: lui $1, 339 334; MIPS64-NEXT: ori $1, $1, 28671 335; MIPS64-NEXT: dmult $4, $1 336; MIPS64-NEXT: jr $ra 337; MIPS64-NEXT: mflo $2 338entry: 339 %b = mul i64 %a, 22245375 340 ret i64 %b 341} 342 343define i32 @mul25165824_32(i32 %a) { 344; MIPS32-LABEL: mul25165824_32: 345; MIPS32: # %bb.0: # %entry 346; MIPS32-NEXT: lui $1, 339 347; MIPS32-NEXT: ori $1, $1, 28671 348; MIPS32-NEXT: jr $ra 349; MIPS32-NEXT: mul $2, $4, $1 350; 351; MIPS64-LABEL: mul25165824_32: 352; MIPS64: # %bb.0: # %entry 353; MIPS64-NEXT: lui $1, 339 354; MIPS64-NEXT: ori $1, $1, 28671 355; MIPS64-NEXT: sll $2, $4, 0 356; MIPS64-NEXT: jr $ra 357; MIPS64-NEXT: mul $2, $2, $1 358entry: 359 %b = mul i32 %a, 22245375 360 ret i32 %b 361} 362 363define i64 @mul25165824_64(i64 %a) { 364; MIPS32-LABEL: mul25165824_64: 365; MIPS32: # %bb.0: # %entry 366; MIPS32-NEXT: srl $1, $4, 9 367; MIPS32-NEXT: sll $2, $5, 23 368; MIPS32-NEXT: or $1, $2, $1 369; MIPS32-NEXT: srl $2, $4, 8 370; MIPS32-NEXT: sll $3, $5, 24 371; MIPS32-NEXT: or $2, $3, $2 372; MIPS32-NEXT: addu $1, $2, $1 373; MIPS32-NEXT: sll $2, $4, 23 374; MIPS32-NEXT: sll $3, $4, 24 375; MIPS32-NEXT: addu $2, $3, $2 376; MIPS32-NEXT: sltu $3, $2, $3 377; MIPS32-NEXT: jr $ra 378; MIPS32-NEXT: addu $3, $1, $3 379; 380; MIPS64-LABEL: mul25165824_64: 381; MIPS64: # %bb.0: # %entry 382; MIPS64-NEXT: dsll $1, $4, 23 383; MIPS64-NEXT: dsll $2, $4, 24 384; MIPS64-NEXT: jr $ra 385; MIPS64-NEXT: daddu $2, $2, $1 386entry: 387 %b = mul i64 %a, 25165824 388 ret i64 %b 389} 390 391define i32 @mul33554432_32(i32 %a) { 392; MIPS32-LABEL: mul33554432_32: 393; MIPS32: # %bb.0: # %entry 394; MIPS32-NEXT: lui $1, 339 395; MIPS32-NEXT: ori $1, $1, 28671 396; MIPS32-NEXT: jr $ra 397; MIPS32-NEXT: mul $2, $4, $1 398; 399; MIPS64-LABEL: mul33554432_32: 400; MIPS64: # %bb.0: # %entry 401; MIPS64-NEXT: lui $1, 339 402; MIPS64-NEXT: ori $1, $1, 28671 403; MIPS64-NEXT: sll $2, $4, 0 404; MIPS64-NEXT: jr $ra 405; MIPS64-NEXT: mul $2, $2, $1 406entry: 407 %b = mul i32 %a, 22245375 408 ret i32 %b 409} 410 411define i64 @mul33554432_64(i64 %a) { 412; MIPS32-LABEL: mul33554432_64: 413; MIPS32: # %bb.0: # %entry 414; MIPS32-NEXT: srl $1, $4, 7 415; MIPS32-NEXT: sll $2, $5, 25 416; MIPS32-NEXT: or $3, $2, $1 417; MIPS32-NEXT: jr $ra 418; MIPS32-NEXT: sll $2, $4, 25 419; 420; MIPS64-LABEL: mul33554432_64: 421; MIPS64: # %bb.0: # %entry 422; MIPS64-NEXT: jr $ra 423; MIPS64-NEXT: dsll $2, $4, 25 424entry: 425 %b = mul i64 %a, 33554432 426 ret i64 %b 427} 428