1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32 3# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64 4--- | 5 6 define void @oeq_s() {entry: ret void} 7 define void @oeq_d() {entry: ret void} 8 9... 10--- 11name: oeq_s 12alignment: 4 13legalized: true 14tracksRegLiveness: true 15body: | 16 bb.1.entry: 17 liveins: $f12, $f14 18 19 ; FP32-LABEL: name: oeq_s 20 ; FP32: liveins: $f12, $f14 21 ; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12 22 ; FP32: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14 23 ; FP32: [[FCMP:%[0-9]+]]:gprb(s32) = G_FCMP floatpred(oeq), [[COPY]](s32), [[COPY1]] 24 ; FP32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[FCMP]](s32) 25 ; FP32: $v0 = COPY [[COPY2]](s32) 26 ; FP32: RetRA implicit $v0 27 ; FP64-LABEL: name: oeq_s 28 ; FP64: liveins: $f12, $f14 29 ; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12 30 ; FP64: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14 31 ; FP64: [[FCMP:%[0-9]+]]:gprb(s32) = G_FCMP floatpred(oeq), [[COPY]](s32), [[COPY1]] 32 ; FP64: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[FCMP]](s32) 33 ; FP64: $v0 = COPY [[COPY2]](s32) 34 ; FP64: RetRA implicit $v0 35 %0:_(s32) = COPY $f12 36 %1:_(s32) = COPY $f14 37 %4:_(s32) = G_FCMP floatpred(oeq), %0(s32), %1 38 %3:_(s32) = COPY %4(s32) 39 $v0 = COPY %3(s32) 40 RetRA implicit $v0 41 42... 43--- 44name: oeq_d 45alignment: 4 46legalized: true 47tracksRegLiveness: true 48body: | 49 bb.1.entry: 50 liveins: $d6, $d7 51 52 ; FP32-LABEL: name: oeq_d 53 ; FP32: liveins: $d6, $d7 54 ; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6 55 ; FP32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7 56 ; FP32: [[FCMP:%[0-9]+]]:gprb(s32) = G_FCMP floatpred(oeq), [[COPY]](s64), [[COPY1]] 57 ; FP32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[FCMP]](s32) 58 ; FP32: $v0 = COPY [[COPY2]](s32) 59 ; FP32: RetRA implicit $v0 60 ; FP64-LABEL: name: oeq_d 61 ; FP64: liveins: $d6, $d7 62 ; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6 63 ; FP64: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7 64 ; FP64: [[FCMP:%[0-9]+]]:gprb(s32) = G_FCMP floatpred(oeq), [[COPY]](s64), [[COPY1]] 65 ; FP64: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[FCMP]](s32) 66 ; FP64: $v0 = COPY [[COPY2]](s32) 67 ; FP64: RetRA implicit $v0 68 %0:_(s64) = COPY $d6 69 %1:_(s64) = COPY $d7 70 %4:_(s32) = G_FCMP floatpred(oeq), %0(s64), %1 71 %3:_(s32) = COPY %4(s32) 72 $v0 = COPY %3(s32) 73 RetRA implicit $v0 74 75... 76