1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32 3 4define i32 @sub_i32(i32 %x, i32 %y) { 5; MIPS32-LABEL: sub_i32: 6; MIPS32: # %bb.0: # %entry 7; MIPS32-NEXT: subu $2, $4, $5 8; MIPS32-NEXT: jr $ra 9; MIPS32-NEXT: nop 10entry: 11 %z = sub i32 %x, %y 12 ret i32 %z 13} 14 15define signext i8 @sub_i8_sext(i8 signext %a, i8 signext %b) { 16; MIPS32-LABEL: sub_i8_sext: 17; MIPS32: # %bb.0: # %entry 18; MIPS32-NEXT: subu $1, $5, $4 19; MIPS32-NEXT: sll $1, $1, 24 20; MIPS32-NEXT: sra $2, $1, 24 21; MIPS32-NEXT: jr $ra 22; MIPS32-NEXT: nop 23entry: 24 %sub = sub i8 %b, %a 25 ret i8 %sub 26} 27 28define zeroext i8 @sub_i8_zext(i8 zeroext %a, i8 zeroext %b) { 29; MIPS32-LABEL: sub_i8_zext: 30; MIPS32: # %bb.0: # %entry 31; MIPS32-NEXT: subu $1, $5, $4 32; MIPS32-NEXT: andi $2, $1, 255 33; MIPS32-NEXT: jr $ra 34; MIPS32-NEXT: nop 35entry: 36 %sub = sub i8 %b, %a 37 ret i8 %sub 38} 39 40define i8 @sub_i8_aext(i8 %a, i8 %b) { 41; MIPS32-LABEL: sub_i8_aext: 42; MIPS32: # %bb.0: # %entry 43; MIPS32-NEXT: subu $2, $5, $4 44; MIPS32-NEXT: jr $ra 45; MIPS32-NEXT: nop 46entry: 47 %sub = sub i8 %b, %a 48 ret i8 %sub 49} 50 51define signext i16 @sub_i16_sext(i16 signext %a, i16 signext %b) { 52; MIPS32-LABEL: sub_i16_sext: 53; MIPS32: # %bb.0: # %entry 54; MIPS32-NEXT: subu $1, $5, $4 55; MIPS32-NEXT: sll $1, $1, 16 56; MIPS32-NEXT: sra $2, $1, 16 57; MIPS32-NEXT: jr $ra 58; MIPS32-NEXT: nop 59entry: 60 %sub = sub i16 %b, %a 61 ret i16 %sub 62} 63 64define zeroext i16 @sub_i16_zext(i16 zeroext %a, i16 zeroext %b) { 65; MIPS32-LABEL: sub_i16_zext: 66; MIPS32: # %bb.0: # %entry 67; MIPS32-NEXT: subu $1, $5, $4 68; MIPS32-NEXT: andi $2, $1, 65535 69; MIPS32-NEXT: jr $ra 70; MIPS32-NEXT: nop 71entry: 72 %sub = sub i16 %b, %a 73 ret i16 %sub 74} 75 76define i16 @sub_i16_aext(i16 %a, i16 %b) { 77; MIPS32-LABEL: sub_i16_aext: 78; MIPS32: # %bb.0: # %entry 79; MIPS32-NEXT: subu $2, $5, $4 80; MIPS32-NEXT: jr $ra 81; MIPS32-NEXT: nop 82entry: 83 %sub = sub i16 %b, %a 84 ret i16 %sub 85} 86 87define i64 @sub_i64(i64 %a, i64 %b) { 88; MIPS32-LABEL: sub_i64: 89; MIPS32: # %bb.0: # %entry 90; MIPS32-NEXT: subu $2, $6, $4 91; MIPS32-NEXT: sltu $3, $6, $4 92; MIPS32-NEXT: subu $1, $7, $5 93; MIPS32-NEXT: subu $3, $1, $3 94; MIPS32-NEXT: jr $ra 95; MIPS32-NEXT: nop 96entry: 97 %sub = sub i64 %b, %a 98 ret i64 %sub 99} 100 101define i128 @sub_i128(i128 %a, i128 %b) { 102; MIPS32-LABEL: sub_i128: 103; MIPS32: # %bb.0: # %entry 104; MIPS32-NEXT: move $9, $4 105; MIPS32-NEXT: addiu $1, $sp, 16 106; MIPS32-NEXT: lw $8, 0($1) 107; MIPS32-NEXT: addiu $1, $sp, 20 108; MIPS32-NEXT: lw $3, 0($1) 109; MIPS32-NEXT: addiu $1, $sp, 24 110; MIPS32-NEXT: lw $4, 0($1) 111; MIPS32-NEXT: addiu $1, $sp, 28 112; MIPS32-NEXT: lw $1, 0($1) 113; MIPS32-NEXT: subu $2, $8, $9 114; MIPS32-NEXT: sltu $9, $8, $9 115; MIPS32-NEXT: subu $8, $3, $5 116; MIPS32-NEXT: sltu $5, $3, $8 117; MIPS32-NEXT: subu $3, $8, $9 118; MIPS32-NEXT: sltiu $8, $8, 1 119; MIPS32-NEXT: and $8, $8, $9 120; MIPS32-NEXT: or $8, $5, $8 121; MIPS32-NEXT: subu $6, $4, $6 122; MIPS32-NEXT: sltu $5, $4, $6 123; MIPS32-NEXT: andi $4, $8, 1 124; MIPS32-NEXT: subu $4, $6, $4 125; MIPS32-NEXT: sltiu $6, $6, 1 126; MIPS32-NEXT: and $6, $6, $8 127; MIPS32-NEXT: or $5, $5, $6 128; MIPS32-NEXT: subu $1, $1, $7 129; MIPS32-NEXT: andi $5, $5, 1 130; MIPS32-NEXT: subu $5, $1, $5 131; MIPS32-NEXT: jr $ra 132; MIPS32-NEXT: nop 133entry: 134 %sub = sub i128 %b, %a 135 ret i128 %sub 136} 137