xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll (revision 8663926a544602932d299dda435ed1ef70a05f48) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
3; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r6 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32R6
4
5@float_align1 = common global float 0.000000e+00, align 1
6@float_align2 = common global float 0.000000e+00, align 2
7@float_align4 = common global float 0.000000e+00, align 4
8@float_align8 = common global float 0.000000e+00, align 8
9@i32_align1 = common global i32 0, align 1
10@i32_align2 = common global i32 0, align 2
11@i32_align4 = common global i32 0, align 4
12@i32_align8 = common global i32 0, align 8
13
14define void @store_float_align1(float %a) {
15; MIPS32-LABEL: store_float_align1:
16; MIPS32:       # %bb.0: # %entry
17; MIPS32-NEXT:    lui $1, %hi(float_align1)
18; MIPS32-NEXT:    addiu $2, $1, %lo(float_align1)
19; MIPS32-NEXT:    mfc1 $1, $f12
20; MIPS32-NEXT:    swl $1, 3($2)
21; MIPS32-NEXT:    swr $1, 0($2)
22; MIPS32-NEXT:    jr $ra
23; MIPS32-NEXT:    nop
24;
25; MIPS32R6-LABEL: store_float_align1:
26; MIPS32R6:       # %bb.0: # %entry
27; MIPS32R6-NEXT:    lui $1, %hi(float_align1)
28; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align1)
29; MIPS32R6-NEXT:    swc1 $f12, 0($1)
30; MIPS32R6-NEXT:    jrc $ra
31entry:
32  store float %a, ptr @float_align1, align 1
33  ret void
34}
35
36define void @store_float_align2(float %a) {
37; MIPS32-LABEL: store_float_align2:
38; MIPS32:       # %bb.0: # %entry
39; MIPS32-NEXT:    lui $1, %hi(float_align2)
40; MIPS32-NEXT:    addiu $2, $1, %lo(float_align2)
41; MIPS32-NEXT:    mfc1 $1, $f12
42; MIPS32-NEXT:    swl $1, 3($2)
43; MIPS32-NEXT:    swr $1, 0($2)
44; MIPS32-NEXT:    jr $ra
45; MIPS32-NEXT:    nop
46;
47; MIPS32R6-LABEL: store_float_align2:
48; MIPS32R6:       # %bb.0: # %entry
49; MIPS32R6-NEXT:    lui $1, %hi(float_align2)
50; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align2)
51; MIPS32R6-NEXT:    swc1 $f12, 0($1)
52; MIPS32R6-NEXT:    jrc $ra
53entry:
54  store float %a, ptr @float_align2, align 2
55  ret void
56}
57
58define void @store_float_align4(float %a) {
59; MIPS32-LABEL: store_float_align4:
60; MIPS32:       # %bb.0: # %entry
61; MIPS32-NEXT:    lui $1, %hi(float_align4)
62; MIPS32-NEXT:    addiu $1, $1, %lo(float_align4)
63; MIPS32-NEXT:    swc1 $f12, 0($1)
64; MIPS32-NEXT:    jr $ra
65; MIPS32-NEXT:    nop
66;
67; MIPS32R6-LABEL: store_float_align4:
68; MIPS32R6:       # %bb.0: # %entry
69; MIPS32R6-NEXT:    lui $1, %hi(float_align4)
70; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align4)
71; MIPS32R6-NEXT:    swc1 $f12, 0($1)
72; MIPS32R6-NEXT:    jrc $ra
73entry:
74  store float %a, ptr @float_align4, align 4
75  ret void
76}
77
78define void @store_float_align8(float %a) {
79; MIPS32-LABEL: store_float_align8:
80; MIPS32:       # %bb.0: # %entry
81; MIPS32-NEXT:    lui $1, %hi(float_align8)
82; MIPS32-NEXT:    addiu $1, $1, %lo(float_align8)
83; MIPS32-NEXT:    swc1 $f12, 0($1)
84; MIPS32-NEXT:    jr $ra
85; MIPS32-NEXT:    nop
86;
87; MIPS32R6-LABEL: store_float_align8:
88; MIPS32R6:       # %bb.0: # %entry
89; MIPS32R6-NEXT:    lui $1, %hi(float_align8)
90; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align8)
91; MIPS32R6-NEXT:    swc1 $f12, 0($1)
92; MIPS32R6-NEXT:    jrc $ra
93entry:
94  store float %a, ptr @float_align8, align 8
95  ret void
96}
97
98define void @store_i32_align1(i32 signext %a) {
99; MIPS32-LABEL: store_i32_align1:
100; MIPS32:       # %bb.0: # %entry
101; MIPS32-NEXT:    lui $1, %hi(i32_align1)
102; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align1)
103; MIPS32-NEXT:    swl $4, 3($1)
104; MIPS32-NEXT:    swr $4, 0($1)
105; MIPS32-NEXT:    jr $ra
106; MIPS32-NEXT:    nop
107;
108; MIPS32R6-LABEL: store_i32_align1:
109; MIPS32R6:       # %bb.0: # %entry
110; MIPS32R6-NEXT:    lui $1, %hi(i32_align1)
111; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align1)
112; MIPS32R6-NEXT:    sw $4, 0($1)
113; MIPS32R6-NEXT:    jrc $ra
114entry:
115  store i32 %a, ptr @i32_align1, align 1
116  ret void
117}
118
119define void @store_i32_align2(i32 signext %a) {
120; MIPS32-LABEL: store_i32_align2:
121; MIPS32:       # %bb.0: # %entry
122; MIPS32-NEXT:    lui $1, %hi(i32_align2)
123; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align2)
124; MIPS32-NEXT:    swl $4, 3($1)
125; MIPS32-NEXT:    swr $4, 0($1)
126; MIPS32-NEXT:    jr $ra
127; MIPS32-NEXT:    nop
128;
129; MIPS32R6-LABEL: store_i32_align2:
130; MIPS32R6:       # %bb.0: # %entry
131; MIPS32R6-NEXT:    lui $1, %hi(i32_align2)
132; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align2)
133; MIPS32R6-NEXT:    sw $4, 0($1)
134; MIPS32R6-NEXT:    jrc $ra
135entry:
136  store i32 %a, ptr @i32_align2, align 2
137  ret void
138}
139
140define void @store_i32_align4(i32 signext %a) {
141; MIPS32-LABEL: store_i32_align4:
142; MIPS32:       # %bb.0: # %entry
143; MIPS32-NEXT:    lui $1, %hi(i32_align4)
144; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align4)
145; MIPS32-NEXT:    sw $4, 0($1)
146; MIPS32-NEXT:    jr $ra
147; MIPS32-NEXT:    nop
148;
149; MIPS32R6-LABEL: store_i32_align4:
150; MIPS32R6:       # %bb.0: # %entry
151; MIPS32R6-NEXT:    lui $1, %hi(i32_align4)
152; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align4)
153; MIPS32R6-NEXT:    sw $4, 0($1)
154; MIPS32R6-NEXT:    jrc $ra
155entry:
156  store i32 %a, ptr @i32_align4, align 4
157  ret void
158}
159
160define void @store_i32_align8(i32 signext %a) {
161; MIPS32-LABEL: store_i32_align8:
162; MIPS32:       # %bb.0: # %entry
163; MIPS32-NEXT:    lui $1, %hi(i32_align8)
164; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align8)
165; MIPS32-NEXT:    sw $4, 0($1)
166; MIPS32-NEXT:    jr $ra
167; MIPS32-NEXT:    nop
168;
169; MIPS32R6-LABEL: store_i32_align8:
170; MIPS32R6:       # %bb.0: # %entry
171; MIPS32R6-NEXT:    lui $1, %hi(i32_align8)
172; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align8)
173; MIPS32R6-NEXT:    sw $4, 0($1)
174; MIPS32R6-NEXT:    jrc $ra
175entry:
176  store i32 %a, ptr @i32_align8, align 8
177  ret void
178}
179