xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sitofp_and_uitofp.ll (revision 3fee8b346928a24975ebbd6984b583c01ec82955) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP32
3; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP64
4
5define float @i64tof32(i64 signext %a) {
6; MIPS32-LABEL: i64tof32:
7; MIPS32:       # %bb.0: # %entry
8; MIPS32-NEXT:    addiu $sp, $sp, -24
9; MIPS32-NEXT:    .cfi_def_cfa_offset 24
10; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
11; MIPS32-NEXT:    .cfi_offset 31, -4
12; MIPS32-NEXT:    jal __floatdisf
13; MIPS32-NEXT:    nop
14; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
15; MIPS32-NEXT:    addiu $sp, $sp, 24
16; MIPS32-NEXT:    jr $ra
17; MIPS32-NEXT:    nop
18entry:
19  %conv = sitofp i64 %a to float
20  ret float %conv
21}
22
23define float @i32tof32(i32 signext %a) {
24; MIPS32-LABEL: i32tof32:
25; MIPS32:       # %bb.0: # %entry
26; MIPS32-NEXT:    mtc1 $4, $f0
27; MIPS32-NEXT:    cvt.s.w $f0, $f0
28; MIPS32-NEXT:    jr $ra
29; MIPS32-NEXT:    nop
30entry:
31  %conv = sitofp i32 %a to float
32  ret float %conv
33}
34
35define float @i16tof32(i16 signext %a) {
36; MIPS32-LABEL: i16tof32:
37; MIPS32:       # %bb.0: # %entry
38; MIPS32-NEXT:    mtc1 $4, $f0
39; MIPS32-NEXT:    cvt.s.w $f0, $f0
40; MIPS32-NEXT:    jr $ra
41; MIPS32-NEXT:    nop
42entry:
43  %conv = sitofp i16 %a to float
44  ret float %conv
45}
46
47define float @i8tof32(i8 signext %a) {
48; MIPS32-LABEL: i8tof32:
49; MIPS32:       # %bb.0: # %entry
50; MIPS32-NEXT:    mtc1 $4, $f0
51; MIPS32-NEXT:    cvt.s.w $f0, $f0
52; MIPS32-NEXT:    jr $ra
53; MIPS32-NEXT:    nop
54entry:
55  %conv = sitofp i8 %a to float
56  ret float %conv
57}
58
59define double @i64tof64(i64 signext %a) {
60; MIPS32-LABEL: i64tof64:
61; MIPS32:       # %bb.0: # %entry
62; MIPS32-NEXT:    addiu $sp, $sp, -24
63; MIPS32-NEXT:    .cfi_def_cfa_offset 24
64; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
65; MIPS32-NEXT:    .cfi_offset 31, -4
66; MIPS32-NEXT:    jal __floatdidf
67; MIPS32-NEXT:    nop
68; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
69; MIPS32-NEXT:    addiu $sp, $sp, 24
70; MIPS32-NEXT:    jr $ra
71; MIPS32-NEXT:    nop
72entry:
73  %conv = sitofp i64 %a to double
74  ret double %conv
75}
76
77define double @i32tof64(i32 signext %a) {
78; MIPS32-LABEL: i32tof64:
79; MIPS32:       # %bb.0: # %entry
80; MIPS32-NEXT:    mtc1 $4, $f0
81; MIPS32-NEXT:    cvt.d.w $f0, $f0
82; MIPS32-NEXT:    jr $ra
83; MIPS32-NEXT:    nop
84entry:
85  %conv = sitofp i32 %a to double
86  ret double %conv
87}
88
89define double @i16tof64(i16 signext %a) {
90; MIPS32-LABEL: i16tof64:
91; MIPS32:       # %bb.0: # %entry
92; MIPS32-NEXT:    mtc1 $4, $f0
93; MIPS32-NEXT:    cvt.d.w $f0, $f0
94; MIPS32-NEXT:    jr $ra
95; MIPS32-NEXT:    nop
96entry:
97  %conv = sitofp i16 %a to double
98  ret double %conv
99}
100
101define double @i8tof64(i8 signext %a) {
102; MIPS32-LABEL: i8tof64:
103; MIPS32:       # %bb.0: # %entry
104; MIPS32-NEXT:    mtc1 $4, $f0
105; MIPS32-NEXT:    cvt.d.w $f0, $f0
106; MIPS32-NEXT:    jr $ra
107; MIPS32-NEXT:    nop
108entry:
109  %conv = sitofp i8 %a to double
110  ret double %conv
111}
112
113define float @u64tof32(i64 zeroext %a) {
114; MIPS32-LABEL: u64tof32:
115; MIPS32:       # %bb.0: # %entry
116; MIPS32-NEXT:    addiu $sp, $sp, -24
117; MIPS32-NEXT:    .cfi_def_cfa_offset 24
118; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
119; MIPS32-NEXT:    .cfi_offset 31, -4
120; MIPS32-NEXT:    jal __floatundisf
121; MIPS32-NEXT:    nop
122; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
123; MIPS32-NEXT:    addiu $sp, $sp, 24
124; MIPS32-NEXT:    jr $ra
125; MIPS32-NEXT:    nop
126entry:
127  %conv = uitofp i64 %a to float
128  ret float %conv
129}
130
131
132define float @u32tof32(i32 zeroext %a) {
133; FP32-LABEL: u32tof32:
134; FP32:       # %bb.0: # %entry
135; FP32-NEXT:    lui $1, 17200
136; FP32-NEXT:    mtc1 $4, $f0
137; FP32-NEXT:    mtc1 $1, $f1
138; FP32-NEXT:    lui $2, 17200
139; FP32-NEXT:    ori $1, $zero, 0
140; FP32-NEXT:    mtc1 $1, $f2
141; FP32-NEXT:    mtc1 $2, $f3
142; FP32-NEXT:    sub.d $f0, $f0, $f2
143; FP32-NEXT:    cvt.s.d $f0, $f0
144; FP32-NEXT:    jr $ra
145; FP32-NEXT:    nop
146;
147; FP64-LABEL: u32tof32:
148; FP64:       # %bb.0: # %entry
149; FP64-NEXT:    lui $1, 17200
150; FP64-NEXT:    mtc1 $4, $f0
151; FP64-NEXT:    mthc1 $1, $f0
152; FP64-NEXT:    lui $2, 17200
153; FP64-NEXT:    ori $1, $zero, 0
154; FP64-NEXT:    mtc1 $1, $f1
155; FP64-NEXT:    mthc1 $2, $f1
156; FP64-NEXT:    sub.d $f0, $f0, $f1
157; FP64-NEXT:    cvt.s.d $f0, $f0
158; FP64-NEXT:    jr $ra
159; FP64-NEXT:    nop
160entry:
161  %conv = uitofp i32 %a to float
162  ret float %conv
163}
164
165define float @u16tof32(i16 zeroext %a) {
166; FP32-LABEL: u16tof32:
167; FP32:       # %bb.0: # %entry
168; FP32-NEXT:    lui $1, 17200
169; FP32-NEXT:    mtc1 $4, $f0
170; FP32-NEXT:    mtc1 $1, $f1
171; FP32-NEXT:    lui $2, 17200
172; FP32-NEXT:    ori $1, $zero, 0
173; FP32-NEXT:    mtc1 $1, $f2
174; FP32-NEXT:    mtc1 $2, $f3
175; FP32-NEXT:    sub.d $f0, $f0, $f2
176; FP32-NEXT:    cvt.s.d $f0, $f0
177; FP32-NEXT:    jr $ra
178; FP32-NEXT:    nop
179;
180; FP64-LABEL: u16tof32:
181; FP64:       # %bb.0: # %entry
182; FP64-NEXT:    lui $1, 17200
183; FP64-NEXT:    mtc1 $4, $f0
184; FP64-NEXT:    mthc1 $1, $f0
185; FP64-NEXT:    lui $2, 17200
186; FP64-NEXT:    ori $1, $zero, 0
187; FP64-NEXT:    mtc1 $1, $f1
188; FP64-NEXT:    mthc1 $2, $f1
189; FP64-NEXT:    sub.d $f0, $f0, $f1
190; FP64-NEXT:    cvt.s.d $f0, $f0
191; FP64-NEXT:    jr $ra
192; FP64-NEXT:    nop
193entry:
194  %conv = uitofp i16 %a to float
195  ret float %conv
196}
197
198define float @u8tof32(i8 zeroext %a) {
199; FP32-LABEL: u8tof32:
200; FP32:       # %bb.0: # %entry
201; FP32-NEXT:    lui $1, 17200
202; FP32-NEXT:    mtc1 $4, $f0
203; FP32-NEXT:    mtc1 $1, $f1
204; FP32-NEXT:    lui $2, 17200
205; FP32-NEXT:    ori $1, $zero, 0
206; FP32-NEXT:    mtc1 $1, $f2
207; FP32-NEXT:    mtc1 $2, $f3
208; FP32-NEXT:    sub.d $f0, $f0, $f2
209; FP32-NEXT:    cvt.s.d $f0, $f0
210; FP32-NEXT:    jr $ra
211; FP32-NEXT:    nop
212;
213; FP64-LABEL: u8tof32:
214; FP64:       # %bb.0: # %entry
215; FP64-NEXT:    lui $1, 17200
216; FP64-NEXT:    mtc1 $4, $f0
217; FP64-NEXT:    mthc1 $1, $f0
218; FP64-NEXT:    lui $2, 17200
219; FP64-NEXT:    ori $1, $zero, 0
220; FP64-NEXT:    mtc1 $1, $f1
221; FP64-NEXT:    mthc1 $2, $f1
222; FP64-NEXT:    sub.d $f0, $f0, $f1
223; FP64-NEXT:    cvt.s.d $f0, $f0
224; FP64-NEXT:    jr $ra
225; FP64-NEXT:    nop
226entry:
227  %conv = uitofp i8 %a to float
228  ret float %conv
229}
230
231define double @u64tof64(i64 zeroext %a) {
232; MIPS32-LABEL: u64tof64:
233; MIPS32:       # %bb.0: # %entry
234; MIPS32-NEXT:    addiu $sp, $sp, -24
235; MIPS32-NEXT:    .cfi_def_cfa_offset 24
236; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
237; MIPS32-NEXT:    .cfi_offset 31, -4
238; MIPS32-NEXT:    jal __floatundidf
239; MIPS32-NEXT:    nop
240; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
241; MIPS32-NEXT:    addiu $sp, $sp, 24
242; MIPS32-NEXT:    jr $ra
243; MIPS32-NEXT:    nop
244entry:
245  %conv = uitofp i64 %a to double
246  ret double %conv
247}
248
249define double @u32tof64(i32 zeroext %a) {
250; FP32-LABEL: u32tof64:
251; FP32:       # %bb.0: # %entry
252; FP32-NEXT:    lui $1, 17200
253; FP32-NEXT:    mtc1 $4, $f0
254; FP32-NEXT:    mtc1 $1, $f1
255; FP32-NEXT:    lui $2, 17200
256; FP32-NEXT:    ori $1, $zero, 0
257; FP32-NEXT:    mtc1 $1, $f2
258; FP32-NEXT:    mtc1 $2, $f3
259; FP32-NEXT:    sub.d $f0, $f0, $f2
260; FP32-NEXT:    jr $ra
261; FP32-NEXT:    nop
262;
263; FP64-LABEL: u32tof64:
264; FP64:       # %bb.0: # %entry
265; FP64-NEXT:    lui $1, 17200
266; FP64-NEXT:    mtc1 $4, $f0
267; FP64-NEXT:    mthc1 $1, $f0
268; FP64-NEXT:    lui $2, 17200
269; FP64-NEXT:    ori $1, $zero, 0
270; FP64-NEXT:    mtc1 $1, $f1
271; FP64-NEXT:    mthc1 $2, $f1
272; FP64-NEXT:    sub.d $f0, $f0, $f1
273; FP64-NEXT:    jr $ra
274; FP64-NEXT:    nop
275entry:
276  %conv = uitofp i32 %a to double
277  ret double %conv
278}
279
280define double @u16tof64(i16 zeroext %a) {
281; FP32-LABEL: u16tof64:
282; FP32:       # %bb.0: # %entry
283; FP32-NEXT:    lui $1, 17200
284; FP32-NEXT:    mtc1 $4, $f0
285; FP32-NEXT:    mtc1 $1, $f1
286; FP32-NEXT:    lui $2, 17200
287; FP32-NEXT:    ori $1, $zero, 0
288; FP32-NEXT:    mtc1 $1, $f2
289; FP32-NEXT:    mtc1 $2, $f3
290; FP32-NEXT:    sub.d $f0, $f0, $f2
291; FP32-NEXT:    jr $ra
292; FP32-NEXT:    nop
293;
294; FP64-LABEL: u16tof64:
295; FP64:       # %bb.0: # %entry
296; FP64-NEXT:    lui $1, 17200
297; FP64-NEXT:    mtc1 $4, $f0
298; FP64-NEXT:    mthc1 $1, $f0
299; FP64-NEXT:    lui $2, 17200
300; FP64-NEXT:    ori $1, $zero, 0
301; FP64-NEXT:    mtc1 $1, $f1
302; FP64-NEXT:    mthc1 $2, $f1
303; FP64-NEXT:    sub.d $f0, $f0, $f1
304; FP64-NEXT:    jr $ra
305; FP64-NEXT:    nop
306entry:
307  %conv = uitofp i16 %a to double
308  ret double %conv
309}
310
311define double @u8tof64(i8 zeroext %a) {
312; FP32-LABEL: u8tof64:
313; FP32:       # %bb.0: # %entry
314; FP32-NEXT:    lui $1, 17200
315; FP32-NEXT:    mtc1 $4, $f0
316; FP32-NEXT:    mtc1 $1, $f1
317; FP32-NEXT:    lui $2, 17200
318; FP32-NEXT:    ori $1, $zero, 0
319; FP32-NEXT:    mtc1 $1, $f2
320; FP32-NEXT:    mtc1 $2, $f3
321; FP32-NEXT:    sub.d $f0, $f0, $f2
322; FP32-NEXT:    jr $ra
323; FP32-NEXT:    nop
324;
325; FP64-LABEL: u8tof64:
326; FP64:       # %bb.0: # %entry
327; FP64-NEXT:    lui $1, 17200
328; FP64-NEXT:    mtc1 $4, $f0
329; FP64-NEXT:    mthc1 $1, $f0
330; FP64-NEXT:    lui $2, 17200
331; FP64-NEXT:    ori $1, $zero, 0
332; FP64-NEXT:    mtc1 $1, $f1
333; FP64-NEXT:    mthc1 $2, $f1
334; FP64-NEXT:    sub.d $f0, $f0, $f1
335; FP64-NEXT:    jr $ra
336; FP64-NEXT:    nop
337entry:
338  %conv = uitofp i8 %a to double
339  ret double %conv
340}
341