xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_store_vec.ll (revision 8663926a544602932d299dda435ed1ef70a05f48) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r5 -mattr=msa,+fp64 -mattr=nan2008 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=P5600
3
4define void @load_store_v16i8(ptr %a, ptr %b) {
5; P5600-LABEL: load_store_v16i8:
6; P5600:       # %bb.0: # %entry
7; P5600-NEXT:    ld.b $w0, 0($5)
8; P5600-NEXT:    st.b $w0, 0($4)
9; P5600-NEXT:    jr $ra
10; P5600-NEXT:    nop
11entry:
12  %0 = load <16 x i8>, ptr %b, align 16
13  store <16 x i8> %0, ptr %a, align 16
14  ret void
15}
16
17define void @load_store_v8i16(ptr %a, ptr %b) {
18; P5600-LABEL: load_store_v8i16:
19; P5600:       # %bb.0: # %entry
20; P5600-NEXT:    ld.h $w0, 0($5)
21; P5600-NEXT:    st.h $w0, 0($4)
22; P5600-NEXT:    jr $ra
23; P5600-NEXT:    nop
24entry:
25  %0 = load <8 x i16>, ptr %b, align 16
26  store <8 x i16> %0, ptr %a, align 16
27  ret void
28}
29
30define void @load_store_v4i32(ptr %a, ptr %b) {
31; P5600-LABEL: load_store_v4i32:
32; P5600:       # %bb.0: # %entry
33; P5600-NEXT:    ld.w $w0, 0($5)
34; P5600-NEXT:    st.w $w0, 0($4)
35; P5600-NEXT:    jr $ra
36; P5600-NEXT:    nop
37entry:
38  %0 = load <4 x i32>, ptr %b, align 16
39  store <4 x i32> %0, ptr %a, align 16
40  ret void
41}
42
43define void @load_store_v2i64(ptr %a, ptr %b) {
44; P5600-LABEL: load_store_v2i64:
45; P5600:       # %bb.0: # %entry
46; P5600-NEXT:    ld.d $w0, 0($5)
47; P5600-NEXT:    st.d $w0, 0($4)
48; P5600-NEXT:    jr $ra
49; P5600-NEXT:    nop
50entry:
51  %0 = load <2 x i64>, ptr %b, align 16
52  store <2 x i64> %0, ptr %a, align 16
53  ret void
54}
55
56define void @load_store_v4f32(ptr %a, ptr %b) {
57; P5600-LABEL: load_store_v4f32:
58; P5600:       # %bb.0: # %entry
59; P5600-NEXT:    ld.w $w0, 0($5)
60; P5600-NEXT:    st.w $w0, 0($4)
61; P5600-NEXT:    jr $ra
62; P5600-NEXT:    nop
63entry:
64  %0 = load <4 x float>, ptr %b, align 16
65  store <4 x float> %0, ptr %a, align 16
66  ret void
67}
68
69define void @load_store_v2f64(ptr %a, ptr %b) {
70; P5600-LABEL: load_store_v2f64:
71; P5600:       # %bb.0: # %entry
72; P5600-NEXT:    ld.d $w0, 0($5)
73; P5600-NEXT:    st.d $w0, 0($4)
74; P5600-NEXT:    jr $ra
75; P5600-NEXT:    nop
76entry:
77  %0 = load <2 x double>, ptr %b, align 16
78  store <2 x double> %0, ptr %a, align 16
79  ret void
80}
81