xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll (revision 373c343a77a7afaa07179db1754a52b620dfaf2e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP32
3; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP64
4
5define i64 @f32toi64(float %a) {
6; MIPS32-LABEL: f32toi64:
7; MIPS32:       # %bb.0: # %entry
8; MIPS32-NEXT:    addiu $sp, $sp, -24
9; MIPS32-NEXT:    .cfi_def_cfa_offset 24
10; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
11; MIPS32-NEXT:    .cfi_offset 31, -4
12; MIPS32-NEXT:    jal __fixsfdi
13; MIPS32-NEXT:    nop
14; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
15; MIPS32-NEXT:    addiu $sp, $sp, 24
16; MIPS32-NEXT:    jr $ra
17; MIPS32-NEXT:    nop
18entry:
19  %conv = fptosi float %a to i64
20  ret i64 %conv
21}
22
23define i32 @f32toi32(float %a) {
24; MIPS32-LABEL: f32toi32:
25; MIPS32:       # %bb.0: # %entry
26; MIPS32-NEXT:    trunc.w.s $f0, $f12
27; MIPS32-NEXT:    mfc1 $2, $f0
28; MIPS32-NEXT:    jr $ra
29; MIPS32-NEXT:    nop
30entry:
31  %conv = fptosi float %a to i32
32  ret i32 %conv
33}
34
35define signext i16 @f32toi16(float %a) {
36; MIPS32-LABEL: f32toi16:
37; MIPS32:       # %bb.0: # %entry
38; MIPS32-NEXT:    trunc.w.s $f0, $f12
39; MIPS32-NEXT:    mfc1 $1, $f0
40; MIPS32-NEXT:    sll $1, $1, 16
41; MIPS32-NEXT:    sra $2, $1, 16
42; MIPS32-NEXT:    jr $ra
43; MIPS32-NEXT:    nop
44entry:
45  %conv = fptosi float %a to i16
46  ret i16 %conv
47}
48
49define signext i8 @f32toi8(float %a) {
50; MIPS32-LABEL: f32toi8:
51; MIPS32:       # %bb.0: # %entry
52; MIPS32-NEXT:    trunc.w.s $f0, $f12
53; MIPS32-NEXT:    mfc1 $1, $f0
54; MIPS32-NEXT:    sll $1, $1, 24
55; MIPS32-NEXT:    sra $2, $1, 24
56; MIPS32-NEXT:    jr $ra
57; MIPS32-NEXT:    nop
58entry:
59  %conv = fptosi float %a to i8
60  ret i8 %conv
61}
62
63define i64 @f64toi64(double %a) {
64; MIPS32-LABEL: f64toi64:
65; MIPS32:       # %bb.0: # %entry
66; MIPS32-NEXT:    addiu $sp, $sp, -24
67; MIPS32-NEXT:    .cfi_def_cfa_offset 24
68; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
69; MIPS32-NEXT:    .cfi_offset 31, -4
70; MIPS32-NEXT:    jal __fixdfdi
71; MIPS32-NEXT:    nop
72; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
73; MIPS32-NEXT:    addiu $sp, $sp, 24
74; MIPS32-NEXT:    jr $ra
75; MIPS32-NEXT:    nop
76entry:
77  %conv = fptosi double %a to i64
78  ret i64 %conv
79}
80
81define i32 @f64toi32(double %a) {
82; MIPS32-LABEL: f64toi32:
83; MIPS32:       # %bb.0: # %entry
84; MIPS32-NEXT:    trunc.w.d $f0, $f12
85; MIPS32-NEXT:    mfc1 $2, $f0
86; MIPS32-NEXT:    jr $ra
87; MIPS32-NEXT:    nop
88entry:
89  %conv = fptosi double %a to i32
90  ret i32 %conv
91}
92
93define signext i16 @f64toi16(double %a) {
94; MIPS32-LABEL: f64toi16:
95; MIPS32:       # %bb.0: # %entry
96; MIPS32-NEXT:    trunc.w.d $f0, $f12
97; MIPS32-NEXT:    mfc1 $1, $f0
98; MIPS32-NEXT:    sll $1, $1, 16
99; MIPS32-NEXT:    sra $2, $1, 16
100; MIPS32-NEXT:    jr $ra
101; MIPS32-NEXT:    nop
102entry:
103  %conv = fptosi double %a to i16
104  ret i16 %conv
105}
106
107define signext i8 @f64toi8(double %a) {
108; MIPS32-LABEL: f64toi8:
109; MIPS32:       # %bb.0: # %entry
110; MIPS32-NEXT:    trunc.w.d $f0, $f12
111; MIPS32-NEXT:    mfc1 $1, $f0
112; MIPS32-NEXT:    sll $1, $1, 24
113; MIPS32-NEXT:    sra $2, $1, 24
114; MIPS32-NEXT:    jr $ra
115; MIPS32-NEXT:    nop
116entry:
117  %conv = fptosi double %a to i8
118  ret i8 %conv
119}
120
121define i64 @f32tou64(float %a) {
122; MIPS32-LABEL: f32tou64:
123; MIPS32:       # %bb.0: # %entry
124; MIPS32-NEXT:    addiu $sp, $sp, -24
125; MIPS32-NEXT:    .cfi_def_cfa_offset 24
126; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
127; MIPS32-NEXT:    .cfi_offset 31, -4
128; MIPS32-NEXT:    jal __fixunssfdi
129; MIPS32-NEXT:    nop
130; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
131; MIPS32-NEXT:    addiu $sp, $sp, 24
132; MIPS32-NEXT:    jr $ra
133; MIPS32-NEXT:    nop
134entry:
135  %conv = fptoui float %a to i64
136  ret i64 %conv
137}
138
139define i32 @f32tou32(float %a) {
140; MIPS32-LABEL: f32tou32:
141; MIPS32:       # %bb.0: # %entry
142; MIPS32-NEXT:    trunc.w.s $f0, $f12
143; MIPS32-NEXT:    mfc1 $1, $f0
144; MIPS32-NEXT:    lui $2, 20224
145; MIPS32-NEXT:    mtc1 $2, $f0
146; MIPS32-NEXT:    sub.s $f1, $f12, $f0
147; MIPS32-NEXT:    trunc.w.s $f1, $f1
148; MIPS32-NEXT:    mfc1 $2, $f1
149; MIPS32-NEXT:    lui $3, 32768
150; MIPS32-NEXT:    xor $2, $2, $3
151; MIPS32-NEXT:    addiu $3, $zero, 1
152; MIPS32-NEXT:    c.ult.s $f12, $f0
153; MIPS32-NEXT:    movf $3, $zero, $fcc0
154; MIPS32-NEXT:    movn $2, $1, $3
155; MIPS32-NEXT:    jr $ra
156; MIPS32-NEXT:    nop
157entry:
158  %conv = fptoui float %a to i32
159  ret i32 %conv
160}
161
162define zeroext i16 @f32tou16(float %a) {
163; MIPS32-LABEL: f32tou16:
164; MIPS32:       # %bb.0: # %entry
165; MIPS32-NEXT:    trunc.w.s $f0, $f12
166; MIPS32-NEXT:    mfc1 $2, $f0
167; MIPS32-NEXT:    lui $1, 20224
168; MIPS32-NEXT:    mtc1 $1, $f0
169; MIPS32-NEXT:    sub.s $f1, $f12, $f0
170; MIPS32-NEXT:    trunc.w.s $f1, $f1
171; MIPS32-NEXT:    mfc1 $1, $f1
172; MIPS32-NEXT:    lui $3, 32768
173; MIPS32-NEXT:    xor $1, $1, $3
174; MIPS32-NEXT:    addiu $3, $zero, 1
175; MIPS32-NEXT:    c.ult.s $f12, $f0
176; MIPS32-NEXT:    movf $3, $zero, $fcc0
177; MIPS32-NEXT:    movn $1, $2, $3
178; MIPS32-NEXT:    andi $2, $1, 65535
179; MIPS32-NEXT:    jr $ra
180; MIPS32-NEXT:    nop
181entry:
182  %conv = fptoui float %a to i16
183  ret i16 %conv
184}
185
186define zeroext i8 @f32tou8(float %a) {
187; MIPS32-LABEL: f32tou8:
188; MIPS32:       # %bb.0: # %entry
189; MIPS32-NEXT:    trunc.w.s $f0, $f12
190; MIPS32-NEXT:    mfc1 $2, $f0
191; MIPS32-NEXT:    lui $1, 20224
192; MIPS32-NEXT:    mtc1 $1, $f0
193; MIPS32-NEXT:    sub.s $f1, $f12, $f0
194; MIPS32-NEXT:    trunc.w.s $f1, $f1
195; MIPS32-NEXT:    mfc1 $1, $f1
196; MIPS32-NEXT:    lui $3, 32768
197; MIPS32-NEXT:    xor $1, $1, $3
198; MIPS32-NEXT:    addiu $3, $zero, 1
199; MIPS32-NEXT:    c.ult.s $f12, $f0
200; MIPS32-NEXT:    movf $3, $zero, $fcc0
201; MIPS32-NEXT:    movn $1, $2, $3
202; MIPS32-NEXT:    andi $2, $1, 255
203; MIPS32-NEXT:    jr $ra
204; MIPS32-NEXT:    nop
205entry:
206  %conv = fptoui float %a to i8
207  ret i8 %conv
208}
209
210define i64 @f64tou64(double %a) {
211; MIPS32-LABEL: f64tou64:
212; MIPS32:       # %bb.0: # %entry
213; MIPS32-NEXT:    addiu $sp, $sp, -24
214; MIPS32-NEXT:    .cfi_def_cfa_offset 24
215; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
216; MIPS32-NEXT:    .cfi_offset 31, -4
217; MIPS32-NEXT:    jal __fixunsdfdi
218; MIPS32-NEXT:    nop
219; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
220; MIPS32-NEXT:    addiu $sp, $sp, 24
221; MIPS32-NEXT:    jr $ra
222; MIPS32-NEXT:    nop
223entry:
224  %conv = fptoui double %a to i64
225  ret i64 %conv
226}
227
228define i32 @f64tou32(double %a) {
229; FP32-LABEL: f64tou32:
230; FP32:       # %bb.0: # %entry
231; FP32-NEXT:    trunc.w.d $f0, $f12
232; FP32-NEXT:    mfc1 $1, $f0
233; FP32-NEXT:    lui $3, 16864
234; FP32-NEXT:    ori $2, $zero, 0
235; FP32-NEXT:    mtc1 $2, $f0
236; FP32-NEXT:    mtc1 $3, $f1
237; FP32-NEXT:    sub.d $f2, $f12, $f0
238; FP32-NEXT:    trunc.w.d $f2, $f2
239; FP32-NEXT:    mfc1 $2, $f2
240; FP32-NEXT:    lui $3, 32768
241; FP32-NEXT:    xor $2, $2, $3
242; FP32-NEXT:    addiu $3, $zero, 1
243; FP32-NEXT:    c.ult.d $f12, $f0
244; FP32-NEXT:    movf $3, $zero, $fcc0
245; FP32-NEXT:    movn $2, $1, $3
246; FP32-NEXT:    jr $ra
247; FP32-NEXT:    nop
248;
249; FP64-LABEL: f64tou32:
250; FP64:       # %bb.0: # %entry
251; FP64-NEXT:    trunc.w.d $f0, $f12
252; FP64-NEXT:    mfc1 $1, $f0
253; FP64-NEXT:    lui $3, 16864
254; FP64-NEXT:    ori $2, $zero, 0
255; FP64-NEXT:    mtc1 $2, $f0
256; FP64-NEXT:    mthc1 $3, $f0
257; FP64-NEXT:    sub.d $f1, $f12, $f0
258; FP64-NEXT:    trunc.w.d $f1, $f1
259; FP64-NEXT:    mfc1 $2, $f1
260; FP64-NEXT:    lui $3, 32768
261; FP64-NEXT:    xor $2, $2, $3
262; FP64-NEXT:    addiu $3, $zero, 1
263; FP64-NEXT:    c.ult.d $f12, $f0
264; FP64-NEXT:    movf $3, $zero, $fcc0
265; FP64-NEXT:    movn $2, $1, $3
266; FP64-NEXT:    jr $ra
267; FP64-NEXT:    nop
268entry:
269  %conv = fptoui double %a to i32
270  ret i32 %conv
271}
272
273define zeroext i16 @f64tou16(double %a) {
274; FP32-LABEL: f64tou16:
275; FP32:       # %bb.0: # %entry
276; FP32-NEXT:    trunc.w.d $f0, $f12
277; FP32-NEXT:    mfc1 $2, $f0
278; FP32-NEXT:    lui $3, 16864
279; FP32-NEXT:    ori $1, $zero, 0
280; FP32-NEXT:    mtc1 $1, $f0
281; FP32-NEXT:    mtc1 $3, $f1
282; FP32-NEXT:    sub.d $f2, $f12, $f0
283; FP32-NEXT:    trunc.w.d $f2, $f2
284; FP32-NEXT:    mfc1 $1, $f2
285; FP32-NEXT:    lui $3, 32768
286; FP32-NEXT:    xor $1, $1, $3
287; FP32-NEXT:    addiu $3, $zero, 1
288; FP32-NEXT:    c.ult.d $f12, $f0
289; FP32-NEXT:    movf $3, $zero, $fcc0
290; FP32-NEXT:    movn $1, $2, $3
291; FP32-NEXT:    andi $2, $1, 65535
292; FP32-NEXT:    jr $ra
293; FP32-NEXT:    nop
294;
295; FP64-LABEL: f64tou16:
296; FP64:       # %bb.0: # %entry
297; FP64-NEXT:    trunc.w.d $f0, $f12
298; FP64-NEXT:    mfc1 $2, $f0
299; FP64-NEXT:    lui $3, 16864
300; FP64-NEXT:    ori $1, $zero, 0
301; FP64-NEXT:    mtc1 $1, $f0
302; FP64-NEXT:    mthc1 $3, $f0
303; FP64-NEXT:    sub.d $f1, $f12, $f0
304; FP64-NEXT:    trunc.w.d $f1, $f1
305; FP64-NEXT:    mfc1 $1, $f1
306; FP64-NEXT:    lui $3, 32768
307; FP64-NEXT:    xor $1, $1, $3
308; FP64-NEXT:    addiu $3, $zero, 1
309; FP64-NEXT:    c.ult.d $f12, $f0
310; FP64-NEXT:    movf $3, $zero, $fcc0
311; FP64-NEXT:    movn $1, $2, $3
312; FP64-NEXT:    andi $2, $1, 65535
313; FP64-NEXT:    jr $ra
314; FP64-NEXT:    nop
315entry:
316  %conv = fptoui double %a to i16
317  ret i16 %conv
318}
319
320define zeroext i8 @f64tou8(double %a) {
321; FP32-LABEL: f64tou8:
322; FP32:       # %bb.0: # %entry
323; FP32-NEXT:    trunc.w.d $f0, $f12
324; FP32-NEXT:    mfc1 $2, $f0
325; FP32-NEXT:    lui $3, 16864
326; FP32-NEXT:    ori $1, $zero, 0
327; FP32-NEXT:    mtc1 $1, $f0
328; FP32-NEXT:    mtc1 $3, $f1
329; FP32-NEXT:    sub.d $f2, $f12, $f0
330; FP32-NEXT:    trunc.w.d $f2, $f2
331; FP32-NEXT:    mfc1 $1, $f2
332; FP32-NEXT:    lui $3, 32768
333; FP32-NEXT:    xor $1, $1, $3
334; FP32-NEXT:    addiu $3, $zero, 1
335; FP32-NEXT:    c.ult.d $f12, $f0
336; FP32-NEXT:    movf $3, $zero, $fcc0
337; FP32-NEXT:    movn $1, $2, $3
338; FP32-NEXT:    andi $2, $1, 255
339; FP32-NEXT:    jr $ra
340; FP32-NEXT:    nop
341;
342; FP64-LABEL: f64tou8:
343; FP64:       # %bb.0: # %entry
344; FP64-NEXT:    trunc.w.d $f0, $f12
345; FP64-NEXT:    mfc1 $2, $f0
346; FP64-NEXT:    lui $3, 16864
347; FP64-NEXT:    ori $1, $zero, 0
348; FP64-NEXT:    mtc1 $1, $f0
349; FP64-NEXT:    mthc1 $3, $f0
350; FP64-NEXT:    sub.d $f1, $f12, $f0
351; FP64-NEXT:    trunc.w.d $f1, $f1
352; FP64-NEXT:    mfc1 $1, $f1
353; FP64-NEXT:    lui $3, 32768
354; FP64-NEXT:    xor $1, $1, $3
355; FP64-NEXT:    addiu $3, $zero, 1
356; FP64-NEXT:    c.ult.d $f12, $f0
357; FP64-NEXT:    movf $3, $zero, $fcc0
358; FP64-NEXT:    movn $1, $2, $3
359; FP64-NEXT:    andi $2, $1, 255
360; FP64-NEXT:    jr $ra
361; FP64-NEXT:    nop
362entry:
363  %conv = fptoui double %a to i8
364  ret i8 %conv
365}
366