1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32 3 4define i32 @cttz_i32(i32 %a) { 5; MIPS32-LABEL: cttz_i32: 6; MIPS32: # %bb.0: # %entry 7; MIPS32-NEXT: not $1, $4 8; MIPS32-NEXT: addiu $2, $4, -1 9; MIPS32-NEXT: and $2, $1, $2 10; MIPS32-NEXT: ori $1, $zero, 32 11; MIPS32-NEXT: clz $2, $2 12; MIPS32-NEXT: subu $2, $1, $2 13; MIPS32-NEXT: jr $ra 14; MIPS32-NEXT: nop 15entry: 16 %0 = call i32 @llvm.cttz.i32(i32 %a, i1 false) 17 ret i32 %0 18} 19declare i32 @llvm.cttz.i32(i32, i1 immarg) 20 21define i64 @cttz_i64(i64 %a) { 22; MIPS32-LABEL: cttz_i64: 23; MIPS32: # %bb.0: # %entry 24; MIPS32-NEXT: ori $3, $zero, 0 25; MIPS32-NEXT: not $1, $5 26; MIPS32-NEXT: addiu $2, $5, -1 27; MIPS32-NEXT: and $1, $1, $2 28; MIPS32-NEXT: ori $2, $zero, 32 29; MIPS32-NEXT: clz $1, $1 30; MIPS32-NEXT: subu $1, $2, $1 31; MIPS32-NEXT: addiu $1, $1, 32 32; MIPS32-NEXT: not $5, $4 33; MIPS32-NEXT: addiu $6, $4, -1 34; MIPS32-NEXT: and $5, $5, $6 35; MIPS32-NEXT: clz $5, $5 36; MIPS32-NEXT: subu $2, $2, $5 37; MIPS32-NEXT: movz $2, $1, $4 38; MIPS32-NEXT: jr $ra 39; MIPS32-NEXT: nop 40entry: 41 %0 = call i64 @llvm.cttz.i64(i64 %a, i1 false) 42 ret i64 %0 43} 44declare i64 @llvm.cttz.i64(i64, i1 immarg) 45 46 47define i32 @ffs_i32_expansion(i32 %a) { 48; MIPS32-LABEL: ffs_i32_expansion: 49; MIPS32: # %bb.0: # %entry 50; MIPS32-NEXT: ori $1, $zero, 0 51; MIPS32-NEXT: not $2, $4 52; MIPS32-NEXT: addiu $3, $4, -1 53; MIPS32-NEXT: and $3, $2, $3 54; MIPS32-NEXT: ori $2, $zero, 32 55; MIPS32-NEXT: clz $3, $3 56; MIPS32-NEXT: subu $2, $2, $3 57; MIPS32-NEXT: addiu $2, $2, 1 58; MIPS32-NEXT: movz $2, $1, $4 59; MIPS32-NEXT: jr $ra 60; MIPS32-NEXT: nop 61entry: 62 %0 = call i32 @llvm.cttz.i32(i32 %a, i1 true) 63 %1 = add nuw nsw i32 %0, 1 64 %iszero = icmp eq i32 %a, 0 65 %ffs = select i1 %iszero, i32 0, i32 %1 66 ret i32 %ffs 67} 68 69define i64 @ffs_i64_expansion(i64 %a) { 70; MIPS32-LABEL: ffs_i64_expansion: 71; MIPS32: # %bb.0: # %entry 72; MIPS32-NEXT: ori $3, $zero, 1 73; MIPS32-NEXT: ori $1, $zero, 0 74; MIPS32-NEXT: not $2, $5 75; MIPS32-NEXT: addiu $6, $5, -1 76; MIPS32-NEXT: and $6, $2, $6 77; MIPS32-NEXT: ori $2, $zero, 32 78; MIPS32-NEXT: clz $6, $6 79; MIPS32-NEXT: subu $6, $2, $6 80; MIPS32-NEXT: addiu $6, $6, 32 81; MIPS32-NEXT: not $7, $4 82; MIPS32-NEXT: addiu $8, $4, -1 83; MIPS32-NEXT: and $7, $7, $8 84; MIPS32-NEXT: clz $7, $7 85; MIPS32-NEXT: subu $2, $2, $7 86; MIPS32-NEXT: movz $2, $6, $4 87; MIPS32-NEXT: addiu $2, $2, 1 88; MIPS32-NEXT: sltu $6, $2, $3 89; MIPS32-NEXT: addiu $3, $1, 0 90; MIPS32-NEXT: addu $3, $3, $6 91; MIPS32-NEXT: xori $4, $4, 0 92; MIPS32-NEXT: xori $5, $5, 0 93; MIPS32-NEXT: or $4, $4, $5 94; MIPS32-NEXT: movz $2, $1, $4 95; MIPS32-NEXT: movz $3, $1, $4 96; MIPS32-NEXT: jr $ra 97; MIPS32-NEXT: nop 98entry: 99 %0 = call i64 @llvm.cttz.i64(i64 %a, i1 true) 100 %1 = add nuw nsw i64 %0, 1 101 %iszero = icmp eq i64 %a, 0 102 %ffs = select i1 %iszero, i64 0, i64 %1 103 ret i64 %ffs 104} 105