1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32 3; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mattr=+mips32r2 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32R2 4 5declare i32 @llvm.bitreverse.i32(i32) 6define i32 @bitreverse_i32(i32 signext %a) { 7; MIPS32-LABEL: bitreverse_i32: 8; MIPS32: # %bb.0: # %entry 9; MIPS32-NEXT: sll $2, $4, 24 10; MIPS32-NEXT: srl $1, $4, 24 11; MIPS32-NEXT: or $1, $1, $2 12; MIPS32-NEXT: andi $2, $4, 65280 13; MIPS32-NEXT: sll $2, $2, 8 14; MIPS32-NEXT: or $1, $1, $2 15; MIPS32-NEXT: srl $2, $4, 8 16; MIPS32-NEXT: andi $2, $2, 65280 17; MIPS32-NEXT: or $2, $1, $2 18; MIPS32-NEXT: lui $1, 61680 19; MIPS32-NEXT: ori $3, $1, 61680 20; MIPS32-NEXT: and $1, $2, $3 21; MIPS32-NEXT: srl $1, $1, 4 22; MIPS32-NEXT: sll $2, $2, 4 23; MIPS32-NEXT: and $2, $2, $3 24; MIPS32-NEXT: or $2, $1, $2 25; MIPS32-NEXT: lui $1, 52428 26; MIPS32-NEXT: ori $3, $1, 52428 27; MIPS32-NEXT: and $1, $2, $3 28; MIPS32-NEXT: srl $1, $1, 2 29; MIPS32-NEXT: sll $2, $2, 2 30; MIPS32-NEXT: and $2, $2, $3 31; MIPS32-NEXT: or $2, $1, $2 32; MIPS32-NEXT: lui $1, 43690 33; MIPS32-NEXT: ori $3, $1, 43690 34; MIPS32-NEXT: and $1, $2, $3 35; MIPS32-NEXT: srl $1, $1, 1 36; MIPS32-NEXT: sll $2, $2, 1 37; MIPS32-NEXT: and $2, $2, $3 38; MIPS32-NEXT: or $2, $1, $2 39; MIPS32-NEXT: jr $ra 40; MIPS32-NEXT: nop 41; 42; MIPS32R2-LABEL: bitreverse_i32: 43; MIPS32R2: # %bb.0: # %entry 44; MIPS32R2-NEXT: wsbh $1, $4 45; MIPS32R2-NEXT: rotr $2, $1, 16 46; MIPS32R2-NEXT: lui $1, 61680 47; MIPS32R2-NEXT: ori $3, $1, 61680 48; MIPS32R2-NEXT: and $1, $2, $3 49; MIPS32R2-NEXT: srl $1, $1, 4 50; MIPS32R2-NEXT: sll $2, $2, 4 51; MIPS32R2-NEXT: and $2, $2, $3 52; MIPS32R2-NEXT: or $2, $1, $2 53; MIPS32R2-NEXT: lui $1, 52428 54; MIPS32R2-NEXT: ori $3, $1, 52428 55; MIPS32R2-NEXT: and $1, $2, $3 56; MIPS32R2-NEXT: srl $1, $1, 2 57; MIPS32R2-NEXT: sll $2, $2, 2 58; MIPS32R2-NEXT: and $2, $2, $3 59; MIPS32R2-NEXT: or $2, $1, $2 60; MIPS32R2-NEXT: lui $1, 43690 61; MIPS32R2-NEXT: ori $3, $1, 43690 62; MIPS32R2-NEXT: and $1, $2, $3 63; MIPS32R2-NEXT: srl $1, $1, 1 64; MIPS32R2-NEXT: sll $2, $2, 1 65; MIPS32R2-NEXT: and $2, $2, $3 66; MIPS32R2-NEXT: or $2, $1, $2 67; MIPS32R2-NEXT: jr $ra 68; MIPS32R2-NEXT: nop 69entry: 70 %0 = call i32 @llvm.bitreverse.i32(i32 %a) 71 ret i32 %0 72} 73 74declare i64 @llvm.bitreverse.i64(i64) 75define i64 @bitreverse_i64(i64 signext %a) { 76; MIPS32-LABEL: bitreverse_i64: 77; MIPS32: # %bb.0: # %entry 78; MIPS32-NEXT: move $3, $4 79; MIPS32-NEXT: sll $2, $5, 24 80; MIPS32-NEXT: srl $1, $5, 24 81; MIPS32-NEXT: or $1, $1, $2 82; MIPS32-NEXT: andi $2, $5, 65280 83; MIPS32-NEXT: sll $2, $2, 8 84; MIPS32-NEXT: or $1, $1, $2 85; MIPS32-NEXT: srl $2, $5, 8 86; MIPS32-NEXT: andi $2, $2, 65280 87; MIPS32-NEXT: or $2, $1, $2 88; MIPS32-NEXT: lui $1, 61680 89; MIPS32-NEXT: ori $6, $1, 61680 90; MIPS32-NEXT: and $1, $2, $6 91; MIPS32-NEXT: srl $1, $1, 4 92; MIPS32-NEXT: sll $2, $2, 4 93; MIPS32-NEXT: and $2, $2, $6 94; MIPS32-NEXT: or $2, $1, $2 95; MIPS32-NEXT: lui $1, 52428 96; MIPS32-NEXT: ori $5, $1, 52428 97; MIPS32-NEXT: and $1, $2, $5 98; MIPS32-NEXT: srl $1, $1, 2 99; MIPS32-NEXT: sll $2, $2, 2 100; MIPS32-NEXT: and $2, $2, $5 101; MIPS32-NEXT: or $2, $1, $2 102; MIPS32-NEXT: lui $1, 43690 103; MIPS32-NEXT: ori $4, $1, 43690 104; MIPS32-NEXT: and $1, $2, $4 105; MIPS32-NEXT: srl $1, $1, 1 106; MIPS32-NEXT: sll $2, $2, 1 107; MIPS32-NEXT: and $2, $2, $4 108; MIPS32-NEXT: or $2, $1, $2 109; MIPS32-NEXT: sll $7, $3, 24 110; MIPS32-NEXT: srl $1, $3, 24 111; MIPS32-NEXT: or $1, $1, $7 112; MIPS32-NEXT: andi $7, $3, 65280 113; MIPS32-NEXT: sll $7, $7, 8 114; MIPS32-NEXT: or $1, $1, $7 115; MIPS32-NEXT: srl $3, $3, 8 116; MIPS32-NEXT: andi $3, $3, 65280 117; MIPS32-NEXT: or $3, $1, $3 118; MIPS32-NEXT: and $1, $3, $6 119; MIPS32-NEXT: srl $1, $1, 4 120; MIPS32-NEXT: sll $3, $3, 4 121; MIPS32-NEXT: and $3, $3, $6 122; MIPS32-NEXT: or $3, $1, $3 123; MIPS32-NEXT: and $1, $3, $5 124; MIPS32-NEXT: srl $1, $1, 2 125; MIPS32-NEXT: sll $3, $3, 2 126; MIPS32-NEXT: and $3, $3, $5 127; MIPS32-NEXT: or $3, $1, $3 128; MIPS32-NEXT: and $1, $3, $4 129; MIPS32-NEXT: srl $1, $1, 1 130; MIPS32-NEXT: sll $3, $3, 1 131; MIPS32-NEXT: and $3, $3, $4 132; MIPS32-NEXT: or $3, $1, $3 133; MIPS32-NEXT: jr $ra 134; MIPS32-NEXT: nop 135; 136; MIPS32R2-LABEL: bitreverse_i64: 137; MIPS32R2: # %bb.0: # %entry 138; MIPS32R2-NEXT: move $1, $4 139; MIPS32R2-NEXT: wsbh $2, $5 140; MIPS32R2-NEXT: rotr $3, $2, 16 141; MIPS32R2-NEXT: lui $2, 61680 142; MIPS32R2-NEXT: ori $6, $2, 61680 143; MIPS32R2-NEXT: and $2, $3, $6 144; MIPS32R2-NEXT: srl $2, $2, 4 145; MIPS32R2-NEXT: sll $3, $3, 4 146; MIPS32R2-NEXT: and $3, $3, $6 147; MIPS32R2-NEXT: or $3, $2, $3 148; MIPS32R2-NEXT: lui $2, 52428 149; MIPS32R2-NEXT: ori $5, $2, 52428 150; MIPS32R2-NEXT: and $2, $3, $5 151; MIPS32R2-NEXT: srl $2, $2, 2 152; MIPS32R2-NEXT: sll $3, $3, 2 153; MIPS32R2-NEXT: and $3, $3, $5 154; MIPS32R2-NEXT: or $3, $2, $3 155; MIPS32R2-NEXT: lui $2, 43690 156; MIPS32R2-NEXT: ori $4, $2, 43690 157; MIPS32R2-NEXT: and $2, $3, $4 158; MIPS32R2-NEXT: srl $2, $2, 1 159; MIPS32R2-NEXT: sll $3, $3, 1 160; MIPS32R2-NEXT: and $3, $3, $4 161; MIPS32R2-NEXT: or $2, $2, $3 162; MIPS32R2-NEXT: wsbh $1, $1 163; MIPS32R2-NEXT: rotr $3, $1, 16 164; MIPS32R2-NEXT: and $1, $3, $6 165; MIPS32R2-NEXT: srl $1, $1, 4 166; MIPS32R2-NEXT: sll $3, $3, 4 167; MIPS32R2-NEXT: and $3, $3, $6 168; MIPS32R2-NEXT: or $3, $1, $3 169; MIPS32R2-NEXT: and $1, $3, $5 170; MIPS32R2-NEXT: srl $1, $1, 2 171; MIPS32R2-NEXT: sll $3, $3, 2 172; MIPS32R2-NEXT: and $3, $3, $5 173; MIPS32R2-NEXT: or $3, $1, $3 174; MIPS32R2-NEXT: and $1, $3, $4 175; MIPS32R2-NEXT: srl $1, $1, 1 176; MIPS32R2-NEXT: sll $3, $3, 1 177; MIPS32R2-NEXT: and $3, $3, $4 178; MIPS32R2-NEXT: or $3, $1, $3 179; MIPS32R2-NEXT: jr $ra 180; MIPS32R2-NEXT: nop 181entry: 182 %0 = call i64 @llvm.bitreverse.i64(i64 %a) 183 ret i64 %0 184} 185