xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div.mir (revision 2bf4eeeeb60daba9534dd55088067fcf5a65f86b) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @sdiv_i8() {entry: ret void}
6  define void @sdiv_i16() {entry: ret void}
7  define void @sdiv_i32() {entry: ret void}
8  define void @sdiv_i64() {entry: ret void}
9  define void @srem_i8() {entry: ret void}
10  define void @srem_i16() {entry: ret void}
11  define void @srem_i32() {entry: ret void}
12  define void @srem_i64() {entry: ret void}
13  define void @udiv_i8() {entry: ret void}
14  define void @udiv_i16() {entry: ret void}
15  define void @udiv_i32() {entry: ret void}
16  define void @udiv_i64() {entry: ret void}
17  define void @urem_i8() {entry: ret void}
18  define void @urem_i16() {entry: ret void}
19  define void @urem_i32() {entry: ret void}
20  define void @urem_i64() {entry: ret void}
21
22...
23---
24name:            sdiv_i8
25alignment:       4
26tracksRegLiveness: true
27body:             |
28  bb.1.entry:
29    liveins: $a0, $a1
30
31    ; MIPS32-LABEL: name: sdiv_i8
32    ; MIPS32: liveins: $a0, $a1
33    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
34    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
35    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
36    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
37    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
38    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
39    ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
40    ; MIPS32: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
41    ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[SDIV]], [[C]](s32)
42    ; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
43    ; MIPS32: $v0 = COPY [[ASHR2]](s32)
44    ; MIPS32: RetRA implicit $v0
45    %2:_(s32) = COPY $a0
46    %0:_(s8) = G_TRUNC %2(s32)
47    %3:_(s32) = COPY $a1
48    %1:_(s8) = G_TRUNC %3(s32)
49    %4:_(s8) = G_SDIV %1, %0
50    %5:_(s32) = G_SEXT %4(s8)
51    $v0 = COPY %5(s32)
52    RetRA implicit $v0
53
54...
55---
56name:            sdiv_i16
57alignment:       4
58tracksRegLiveness: true
59body:             |
60  bb.1.entry:
61    liveins: $a0, $a1
62
63    ; MIPS32-LABEL: name: sdiv_i16
64    ; MIPS32: liveins: $a0, $a1
65    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
66    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
67    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
68    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
69    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
70    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
71    ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
72    ; MIPS32: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
73    ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[SDIV]], [[C]](s32)
74    ; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
75    ; MIPS32: $v0 = COPY [[ASHR2]](s32)
76    ; MIPS32: RetRA implicit $v0
77    %2:_(s32) = COPY $a0
78    %0:_(s16) = G_TRUNC %2(s32)
79    %3:_(s32) = COPY $a1
80    %1:_(s16) = G_TRUNC %3(s32)
81    %4:_(s16) = G_SDIV %1, %0
82    %5:_(s32) = G_SEXT %4(s16)
83    $v0 = COPY %5(s32)
84    RetRA implicit $v0
85
86...
87---
88name:            sdiv_i32
89alignment:       4
90tracksRegLiveness: true
91body:             |
92  bb.1.entry:
93    liveins: $a0, $a1
94
95    ; MIPS32-LABEL: name: sdiv_i32
96    ; MIPS32: liveins: $a0, $a1
97    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
98    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
99    ; MIPS32: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY1]], [[COPY]]
100    ; MIPS32: $v0 = COPY [[SDIV]](s32)
101    ; MIPS32: RetRA implicit $v0
102    %0:_(s32) = COPY $a0
103    %1:_(s32) = COPY $a1
104    %2:_(s32) = G_SDIV %1, %0
105    $v0 = COPY %2(s32)
106    RetRA implicit $v0
107
108...
109---
110name:            sdiv_i64
111alignment:       4
112tracksRegLiveness: true
113body:             |
114  bb.1.entry:
115    liveins: $a0, $a1, $a2, $a3
116
117    ; MIPS32-LABEL: name: sdiv_i64
118    ; MIPS32: liveins: $a0, $a1, $a2, $a3
119    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
120    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
121    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
122    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
123    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
124    ; MIPS32: $a0 = COPY [[COPY2]](s32)
125    ; MIPS32: $a1 = COPY [[COPY3]](s32)
126    ; MIPS32: $a2 = COPY [[COPY]](s32)
127    ; MIPS32: $a3 = COPY [[COPY1]](s32)
128    ; MIPS32: JAL &__divdi3, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2, implicit $a3, implicit-def $v0, implicit-def $v1
129    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
130    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY $v1
131    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
132    ; MIPS32: $v0 = COPY [[COPY4]](s32)
133    ; MIPS32: $v1 = COPY [[COPY5]](s32)
134    ; MIPS32: RetRA implicit $v0, implicit $v1
135    %2:_(s32) = COPY $a0
136    %3:_(s32) = COPY $a1
137    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
138    %4:_(s32) = COPY $a2
139    %5:_(s32) = COPY $a3
140    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
141    %6:_(s64) = G_SDIV %1, %0
142    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
143    $v0 = COPY %7(s32)
144    $v1 = COPY %8(s32)
145    RetRA implicit $v0, implicit $v1
146
147...
148---
149name:            srem_i8
150alignment:       4
151tracksRegLiveness: true
152body:             |
153  bb.1.entry:
154    liveins: $a0, $a1
155
156    ; MIPS32-LABEL: name: srem_i8
157    ; MIPS32: liveins: $a0, $a1
158    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
159    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
160    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
161    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
162    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
163    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
164    ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
165    ; MIPS32: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
166    ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[SREM]], [[C]](s32)
167    ; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
168    ; MIPS32: $v0 = COPY [[ASHR2]](s32)
169    ; MIPS32: RetRA implicit $v0
170    %2:_(s32) = COPY $a0
171    %0:_(s8) = G_TRUNC %2(s32)
172    %3:_(s32) = COPY $a1
173    %1:_(s8) = G_TRUNC %3(s32)
174    %4:_(s8) = G_SREM %1, %0
175    %5:_(s32) = G_SEXT %4(s8)
176    $v0 = COPY %5(s32)
177    RetRA implicit $v0
178
179...
180---
181name:            srem_i16
182alignment:       4
183tracksRegLiveness: true
184body:             |
185  bb.1.entry:
186    liveins: $a0, $a1
187
188    ; MIPS32-LABEL: name: srem_i16
189    ; MIPS32: liveins: $a0, $a1
190    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
191    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
192    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
193    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
194    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
195    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
196    ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
197    ; MIPS32: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
198    ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[SREM]], [[C]](s32)
199    ; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
200    ; MIPS32: $v0 = COPY [[ASHR2]](s32)
201    ; MIPS32: RetRA implicit $v0
202    %2:_(s32) = COPY $a0
203    %0:_(s16) = G_TRUNC %2(s32)
204    %3:_(s32) = COPY $a1
205    %1:_(s16) = G_TRUNC %3(s32)
206    %4:_(s16) = G_SREM %1, %0
207    %5:_(s32) = G_SEXT %4(s16)
208    $v0 = COPY %5(s32)
209    RetRA implicit $v0
210
211...
212---
213name:            srem_i32
214alignment:       4
215tracksRegLiveness: true
216body:             |
217  bb.1.entry:
218    liveins: $a0, $a1
219
220    ; MIPS32-LABEL: name: srem_i32
221    ; MIPS32: liveins: $a0, $a1
222    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
223    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
224    ; MIPS32: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[COPY1]], [[COPY]]
225    ; MIPS32: $v0 = COPY [[SREM]](s32)
226    ; MIPS32: RetRA implicit $v0
227    %0:_(s32) = COPY $a0
228    %1:_(s32) = COPY $a1
229    %2:_(s32) = G_SREM %1, %0
230    $v0 = COPY %2(s32)
231    RetRA implicit $v0
232
233...
234---
235name:            srem_i64
236alignment:       4
237tracksRegLiveness: true
238body:             |
239  bb.1.entry:
240    liveins: $a0, $a1, $a2, $a3
241
242    ; MIPS32-LABEL: name: srem_i64
243    ; MIPS32: liveins: $a0, $a1, $a2, $a3
244    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
245    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
246    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
247    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
248    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
249    ; MIPS32: $a0 = COPY [[COPY2]](s32)
250    ; MIPS32: $a1 = COPY [[COPY3]](s32)
251    ; MIPS32: $a2 = COPY [[COPY]](s32)
252    ; MIPS32: $a3 = COPY [[COPY1]](s32)
253    ; MIPS32: JAL &__moddi3, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2, implicit $a3, implicit-def $v0, implicit-def $v1
254    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
255    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY $v1
256    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
257    ; MIPS32: $v0 = COPY [[COPY4]](s32)
258    ; MIPS32: $v1 = COPY [[COPY5]](s32)
259    ; MIPS32: RetRA implicit $v0, implicit $v1
260    %2:_(s32) = COPY $a0
261    %3:_(s32) = COPY $a1
262    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
263    %4:_(s32) = COPY $a2
264    %5:_(s32) = COPY $a3
265    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
266    %6:_(s64) = G_SREM %1, %0
267    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
268    $v0 = COPY %7(s32)
269    $v1 = COPY %8(s32)
270    RetRA implicit $v0, implicit $v1
271
272...
273---
274name:            udiv_i8
275alignment:       4
276tracksRegLiveness: true
277body:             |
278  bb.1.entry:
279    liveins: $a0, $a1
280
281    ; MIPS32-LABEL: name: udiv_i8
282    ; MIPS32: liveins: $a0, $a1
283    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
284    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
285    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
286    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
287    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
288    ; MIPS32: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]]
289    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
290    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UDIV]], [[C1]](s32)
291    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
292    ; MIPS32: $v0 = COPY [[ASHR]](s32)
293    ; MIPS32: RetRA implicit $v0
294    %2:_(s32) = COPY $a0
295    %0:_(s8) = G_TRUNC %2(s32)
296    %3:_(s32) = COPY $a1
297    %1:_(s8) = G_TRUNC %3(s32)
298    %4:_(s8) = G_UDIV %1, %0
299    %5:_(s32) = G_SEXT %4(s8)
300    $v0 = COPY %5(s32)
301    RetRA implicit $v0
302
303...
304---
305name:            udiv_i16
306alignment:       4
307tracksRegLiveness: true
308body:             |
309  bb.1.entry:
310    liveins: $a0, $a1
311
312    ; MIPS32-LABEL: name: udiv_i16
313    ; MIPS32: liveins: $a0, $a1
314    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
315    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
316    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
317    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
318    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
319    ; MIPS32: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]]
320    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
321    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UDIV]], [[C1]](s32)
322    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
323    ; MIPS32: $v0 = COPY [[ASHR]](s32)
324    ; MIPS32: RetRA implicit $v0
325    %2:_(s32) = COPY $a0
326    %0:_(s16) = G_TRUNC %2(s32)
327    %3:_(s32) = COPY $a1
328    %1:_(s16) = G_TRUNC %3(s32)
329    %4:_(s16) = G_UDIV %1, %0
330    %5:_(s32) = G_SEXT %4(s16)
331    $v0 = COPY %5(s32)
332    RetRA implicit $v0
333
334...
335---
336name:            udiv_i32
337alignment:       4
338tracksRegLiveness: true
339body:             |
340  bb.1.entry:
341    liveins: $a0, $a1
342
343    ; MIPS32-LABEL: name: udiv_i32
344    ; MIPS32: liveins: $a0, $a1
345    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
346    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
347    ; MIPS32: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[COPY1]], [[COPY]]
348    ; MIPS32: $v0 = COPY [[UDIV]](s32)
349    ; MIPS32: RetRA implicit $v0
350    %0:_(s32) = COPY $a0
351    %1:_(s32) = COPY $a1
352    %2:_(s32) = G_UDIV %1, %0
353    $v0 = COPY %2(s32)
354    RetRA implicit $v0
355
356...
357---
358name:            udiv_i64
359alignment:       4
360tracksRegLiveness: true
361body:             |
362  bb.1.entry:
363    liveins: $a0, $a1, $a2, $a3
364
365    ; MIPS32-LABEL: name: udiv_i64
366    ; MIPS32: liveins: $a0, $a1, $a2, $a3
367    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
368    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
369    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
370    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
371    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
372    ; MIPS32: $a0 = COPY [[COPY2]](s32)
373    ; MIPS32: $a1 = COPY [[COPY3]](s32)
374    ; MIPS32: $a2 = COPY [[COPY]](s32)
375    ; MIPS32: $a3 = COPY [[COPY1]](s32)
376    ; MIPS32: JAL &__udivdi3, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2, implicit $a3, implicit-def $v0, implicit-def $v1
377    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
378    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY $v1
379    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
380    ; MIPS32: $v0 = COPY [[COPY4]](s32)
381    ; MIPS32: $v1 = COPY [[COPY5]](s32)
382    ; MIPS32: RetRA implicit $v0, implicit $v1
383    %2:_(s32) = COPY $a0
384    %3:_(s32) = COPY $a1
385    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
386    %4:_(s32) = COPY $a2
387    %5:_(s32) = COPY $a3
388    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
389    %6:_(s64) = G_UDIV %1, %0
390    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
391    $v0 = COPY %7(s32)
392    $v1 = COPY %8(s32)
393    RetRA implicit $v0, implicit $v1
394
395...
396---
397name:            urem_i8
398alignment:       4
399tracksRegLiveness: true
400body:             |
401  bb.1.entry:
402    liveins: $a0, $a1
403
404    ; MIPS32-LABEL: name: urem_i8
405    ; MIPS32: liveins: $a0, $a1
406    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
407    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
408    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
409    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
410    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
411    ; MIPS32: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[AND]], [[AND1]]
412    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
413    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UREM]], [[C1]](s32)
414    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
415    ; MIPS32: $v0 = COPY [[ASHR]](s32)
416    ; MIPS32: RetRA implicit $v0
417    %2:_(s32) = COPY $a0
418    %0:_(s8) = G_TRUNC %2(s32)
419    %3:_(s32) = COPY $a1
420    %1:_(s8) = G_TRUNC %3(s32)
421    %4:_(s8) = G_UREM %1, %0
422    %5:_(s32) = G_SEXT %4(s8)
423    $v0 = COPY %5(s32)
424    RetRA implicit $v0
425
426...
427---
428name:            urem_i16
429alignment:       4
430tracksRegLiveness: true
431body:             |
432  bb.1.entry:
433    liveins: $a0, $a1
434
435    ; MIPS32-LABEL: name: urem_i16
436    ; MIPS32: liveins: $a0, $a1
437    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
438    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
439    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
440    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
441    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
442    ; MIPS32: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[AND]], [[AND1]]
443    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
444    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UREM]], [[C1]](s32)
445    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
446    ; MIPS32: $v0 = COPY [[ASHR]](s32)
447    ; MIPS32: RetRA implicit $v0
448    %2:_(s32) = COPY $a0
449    %0:_(s16) = G_TRUNC %2(s32)
450    %3:_(s32) = COPY $a1
451    %1:_(s16) = G_TRUNC %3(s32)
452    %4:_(s16) = G_UREM %1, %0
453    %5:_(s32) = G_SEXT %4(s16)
454    $v0 = COPY %5(s32)
455    RetRA implicit $v0
456
457...
458---
459name:            urem_i32
460alignment:       4
461tracksRegLiveness: true
462body:             |
463  bb.1.entry:
464    liveins: $a0, $a1
465
466    ; MIPS32-LABEL: name: urem_i32
467    ; MIPS32: liveins: $a0, $a1
468    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
469    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
470    ; MIPS32: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY1]], [[COPY]]
471    ; MIPS32: $v0 = COPY [[UREM]](s32)
472    ; MIPS32: RetRA implicit $v0
473    %0:_(s32) = COPY $a0
474    %1:_(s32) = COPY $a1
475    %2:_(s32) = G_UREM %1, %0
476    $v0 = COPY %2(s32)
477    RetRA implicit $v0
478
479...
480---
481name:            urem_i64
482alignment:       4
483tracksRegLiveness: true
484body:             |
485  bb.1.entry:
486    liveins: $a0, $a1, $a2, $a3
487
488    ; MIPS32-LABEL: name: urem_i64
489    ; MIPS32: liveins: $a0, $a1, $a2, $a3
490    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
491    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
492    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
493    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
494    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
495    ; MIPS32: $a0 = COPY [[COPY2]](s32)
496    ; MIPS32: $a1 = COPY [[COPY3]](s32)
497    ; MIPS32: $a2 = COPY [[COPY]](s32)
498    ; MIPS32: $a3 = COPY [[COPY1]](s32)
499    ; MIPS32: JAL &__umoddi3, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2, implicit $a3, implicit-def $v0, implicit-def $v1
500    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
501    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY $v1
502    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
503    ; MIPS32: $v0 = COPY [[COPY4]](s32)
504    ; MIPS32: $v1 = COPY [[COPY5]](s32)
505    ; MIPS32: RetRA implicit $v0, implicit $v1
506    %2:_(s32) = COPY $a0
507    %3:_(s32) = COPY $a1
508    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
509    %4:_(s32) = COPY $a2
510    %5:_(s32) = COPY $a3
511    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
512    %6:_(s64) = G_UREM %1, %0
513    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
514    $v0 = COPY %7(s32)
515    $v1 = COPY %8(s32)
516    RetRA implicit $v0, implicit $v1
517
518...
519