xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir (revision 48904e9452de81375bd55d830d08e51cc8f2ec7e) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
3# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
4--- |
5
6  define void @ceil_f32() {entry: ret void}
7  define void @ceil_f64() {entry: ret void}
8  define void @floor_f32() {entry: ret void}
9  define void @floor_f64() {entry: ret void}
10
11...
12---
13name:            ceil_f32
14alignment:       4
15tracksRegLiveness: true
16body:             |
17  bb.1.entry:
18    liveins: $f12
19
20    ; FP32-LABEL: name: ceil_f32
21    ; FP32: liveins: $f12
22    ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
23    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
24    ; FP32: $f12 = COPY [[COPY]](s32)
25    ; FP32: JAL &ceilf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
26    ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
27    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
28    ; FP32: $f0 = COPY [[COPY1]](s32)
29    ; FP32: RetRA implicit $f0
30    ; FP64-LABEL: name: ceil_f32
31    ; FP64: liveins: $f12
32    ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
33    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
34    ; FP64: $f12 = COPY [[COPY]](s32)
35    ; FP64: JAL &ceilf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
36    ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
37    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
38    ; FP64: $f0 = COPY [[COPY1]](s32)
39    ; FP64: RetRA implicit $f0
40    %0:_(s32) = COPY $f12
41    %1:_(s32) = G_FCEIL %0
42    $f0 = COPY %1(s32)
43    RetRA implicit $f0
44
45...
46---
47name:            ceil_f64
48alignment:       4
49tracksRegLiveness: true
50body:             |
51  bb.1.entry:
52    liveins: $d6
53
54    ; FP32-LABEL: name: ceil_f64
55    ; FP32: liveins: $d6
56    ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
57    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
58    ; FP32: $d6 = COPY [[COPY]](s64)
59    ; FP32: JAL &ceil, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $d0
60    ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
61    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
62    ; FP32: $d0 = COPY [[COPY1]](s64)
63    ; FP32: RetRA implicit $d0
64    ; FP64-LABEL: name: ceil_f64
65    ; FP64: liveins: $d6
66    ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
67    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
68    ; FP64: $d12_64 = COPY [[COPY]](s64)
69    ; FP64: JAL &ceil, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $d0_64
70    ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0_64
71    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
72    ; FP64: $d0 = COPY [[COPY1]](s64)
73    ; FP64: RetRA implicit $d0
74    %0:_(s64) = COPY $d6
75    %1:_(s64) = G_FCEIL %0
76    $d0 = COPY %1(s64)
77    RetRA implicit $d0
78
79...
80---
81name:            floor_f32
82alignment:       4
83tracksRegLiveness: true
84body:             |
85  bb.1.entry:
86    liveins: $f12
87
88    ; FP32-LABEL: name: floor_f32
89    ; FP32: liveins: $f12
90    ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
91    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
92    ; FP32: $f12 = COPY [[COPY]](s32)
93    ; FP32: JAL &floorf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
94    ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
95    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
96    ; FP32: $f0 = COPY [[COPY1]](s32)
97    ; FP32: RetRA implicit $f0
98    ; FP64-LABEL: name: floor_f32
99    ; FP64: liveins: $f12
100    ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
101    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
102    ; FP64: $f12 = COPY [[COPY]](s32)
103    ; FP64: JAL &floorf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
104    ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
105    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
106    ; FP64: $f0 = COPY [[COPY1]](s32)
107    ; FP64: RetRA implicit $f0
108    %0:_(s32) = COPY $f12
109    %1:_(s32) = G_FFLOOR %0
110    $f0 = COPY %1(s32)
111    RetRA implicit $f0
112
113...
114---
115name:            floor_f64
116alignment:       4
117tracksRegLiveness: true
118body:             |
119  bb.1.entry:
120    liveins: $d6
121
122    ; FP32-LABEL: name: floor_f64
123    ; FP32: liveins: $d6
124    ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
125    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
126    ; FP32: $d6 = COPY [[COPY]](s64)
127    ; FP32: JAL &floor, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $d0
128    ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
129    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
130    ; FP32: $d0 = COPY [[COPY1]](s64)
131    ; FP32: RetRA implicit $d0
132    ; FP64-LABEL: name: floor_f64
133    ; FP64: liveins: $d6
134    ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
135    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
136    ; FP64: $d12_64 = COPY [[COPY]](s64)
137    ; FP64: JAL &floor, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $d0_64
138    ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0_64
139    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
140    ; FP64: $d0 = COPY [[COPY1]](s64)
141    ; FP64: RetRA implicit $d0
142    %0:_(s64) = COPY $d6
143    %1:_(s64) = G_FFLOOR %0
144    $d0 = COPY %1(s64)
145    RetRA implicit $d0
146
147...
148