xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir (revision 373c343a77a7afaa07179db1754a52b620dfaf2e) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @and_i1() {entry: ret void}
6  define void @and_i8() {entry: ret void}
7  define void @and_i16() {entry: ret void}
8  define void @and_i32() {entry: ret void}
9  define void @and_i64() {entry: ret void}
10  define void @or_i1() {entry: ret void}
11  define void @or_i8() {entry: ret void}
12  define void @or_i16() {entry: ret void}
13  define void @or_i32() {entry: ret void}
14  define void @or_i64() {entry: ret void}
15  define void @xor_i1() {entry: ret void}
16  define void @xor_i8() {entry: ret void}
17  define void @xor_i16() {entry: ret void}
18  define void @xor_i32() {entry: ret void}
19  define void @xor_i64() {entry: ret void}
20  define void @shl(i32) {entry: ret void}
21  define void @ashr(i32) {entry: ret void}
22  define void @lshr(i32) {entry: ret void}
23  define void @lshr_i64_shift_amount(i32) {entry: ret void}
24  define void @shlv(i32, i32) {entry: ret void}
25  define void @ashrv(i32, i32) {entry: ret void}
26  define void @lshrv(i32, i32) {entry: ret void}
27  define void @shl_i16() {entry: ret void}
28  define void @ashr_i8() {entry: ret void}
29  define void @lshr_i16() {entry: ret void}
30  define void @shl_i64() {entry: ret void}
31  define void @ashl_i64() {entry: ret void}
32  define void @lshr_i64() {entry: ret void}
33
34...
35---
36name:            and_i1
37alignment:       4
38tracksRegLiveness: true
39body:             |
40  bb.1.entry:
41    liveins: $a0, $a1
42
43    ; MIPS32-LABEL: name: and_i1
44    ; MIPS32: liveins: $a0, $a1
45    ; MIPS32-NEXT: {{  $}}
46    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
47    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
48    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]
49    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
50    ; MIPS32-NEXT: RetRA implicit $v0
51    %2:_(s32) = COPY $a0
52    %0:_(s1) = G_TRUNC %2(s32)
53    %3:_(s32) = COPY $a1
54    %1:_(s1) = G_TRUNC %3(s32)
55    %4:_(s1) = G_AND %1, %0
56    %5:_(s32) = G_ANYEXT %4(s1)
57    $v0 = COPY %5(s32)
58    RetRA implicit $v0
59
60...
61---
62name:            and_i8
63alignment:       4
64tracksRegLiveness: true
65body:             |
66  bb.1.entry:
67    liveins: $a0, $a1
68
69    ; MIPS32-LABEL: name: and_i8
70    ; MIPS32: liveins: $a0, $a1
71    ; MIPS32-NEXT: {{  $}}
72    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
73    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
74    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]
75    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
76    ; MIPS32-NEXT: RetRA implicit $v0
77    %2:_(s32) = COPY $a0
78    %0:_(s8) = G_TRUNC %2(s32)
79    %3:_(s32) = COPY $a1
80    %1:_(s8) = G_TRUNC %3(s32)
81    %4:_(s8) = G_AND %1, %0
82    %5:_(s32) = G_ANYEXT %4(s8)
83    $v0 = COPY %5(s32)
84    RetRA implicit $v0
85
86...
87---
88name:            and_i16
89alignment:       4
90tracksRegLiveness: true
91body:             |
92  bb.1.entry:
93    liveins: $a0, $a1
94
95    ; MIPS32-LABEL: name: and_i16
96    ; MIPS32: liveins: $a0, $a1
97    ; MIPS32-NEXT: {{  $}}
98    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
99    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
100    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]
101    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
102    ; MIPS32-NEXT: RetRA implicit $v0
103    %2:_(s32) = COPY $a0
104    %0:_(s16) = G_TRUNC %2(s32)
105    %3:_(s32) = COPY $a1
106    %1:_(s16) = G_TRUNC %3(s32)
107    %4:_(s16) = G_AND %1, %0
108    %5:_(s32) = G_ANYEXT %4(s16)
109    $v0 = COPY %5(s32)
110    RetRA implicit $v0
111
112...
113---
114name:            and_i32
115alignment:       4
116tracksRegLiveness: true
117body:             |
118  bb.1.entry:
119    liveins: $a0, $a1
120
121    ; MIPS32-LABEL: name: and_i32
122    ; MIPS32: liveins: $a0, $a1
123    ; MIPS32-NEXT: {{  $}}
124    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
125    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
126    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]
127    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
128    ; MIPS32-NEXT: RetRA implicit $v0
129    %0:_(s32) = COPY $a0
130    %1:_(s32) = COPY $a1
131    %2:_(s32) = G_AND %1, %0
132    $v0 = COPY %2(s32)
133    RetRA implicit $v0
134
135...
136---
137name:            and_i64
138alignment:       4
139tracksRegLiveness: true
140body:             |
141  bb.1.entry:
142    liveins: $a0, $a1, $a2, $a3
143
144    ; MIPS32-LABEL: name: and_i64
145    ; MIPS32: liveins: $a0, $a1, $a2, $a3
146    ; MIPS32-NEXT: {{  $}}
147    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
148    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
149    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
150    ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
151    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY]]
152    ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[COPY1]]
153    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
154    ; MIPS32-NEXT: $v1 = COPY [[AND1]](s32)
155    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
156    %2:_(s32) = COPY $a0
157    %3:_(s32) = COPY $a1
158    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
159    %4:_(s32) = COPY $a2
160    %5:_(s32) = COPY $a3
161    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
162    %6:_(s64) = G_AND %1, %0
163    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
164    $v0 = COPY %7(s32)
165    $v1 = COPY %8(s32)
166    RetRA implicit $v0, implicit $v1
167
168...
169---
170name:            or_i1
171alignment:       4
172tracksRegLiveness: true
173body:             |
174  bb.1.entry:
175    liveins: $a0, $a1
176
177    ; MIPS32-LABEL: name: or_i1
178    ; MIPS32: liveins: $a0, $a1
179    ; MIPS32-NEXT: {{  $}}
180    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
181    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
182    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]
183    ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)
184    ; MIPS32-NEXT: RetRA implicit $v0
185    %2:_(s32) = COPY $a0
186    %0:_(s1) = G_TRUNC %2(s32)
187    %3:_(s32) = COPY $a1
188    %1:_(s1) = G_TRUNC %3(s32)
189    %4:_(s1) = G_OR %1, %0
190    %5:_(s32) = G_ANYEXT %4(s1)
191    $v0 = COPY %5(s32)
192    RetRA implicit $v0
193
194...
195---
196name:            or_i8
197alignment:       4
198tracksRegLiveness: true
199body:             |
200  bb.1.entry:
201    liveins: $a0, $a1
202
203    ; MIPS32-LABEL: name: or_i8
204    ; MIPS32: liveins: $a0, $a1
205    ; MIPS32-NEXT: {{  $}}
206    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
207    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
208    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]
209    ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)
210    ; MIPS32-NEXT: RetRA implicit $v0
211    %2:_(s32) = COPY $a0
212    %0:_(s8) = G_TRUNC %2(s32)
213    %3:_(s32) = COPY $a1
214    %1:_(s8) = G_TRUNC %3(s32)
215    %4:_(s8) = G_OR %1, %0
216    %5:_(s32) = G_ANYEXT %4(s8)
217    $v0 = COPY %5(s32)
218    RetRA implicit $v0
219
220...
221---
222name:            or_i16
223alignment:       4
224tracksRegLiveness: true
225body:             |
226  bb.1.entry:
227    liveins: $a0, $a1
228
229    ; MIPS32-LABEL: name: or_i16
230    ; MIPS32: liveins: $a0, $a1
231    ; MIPS32-NEXT: {{  $}}
232    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
233    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
234    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]
235    ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)
236    ; MIPS32-NEXT: RetRA implicit $v0
237    %2:_(s32) = COPY $a0
238    %0:_(s16) = G_TRUNC %2(s32)
239    %3:_(s32) = COPY $a1
240    %1:_(s16) = G_TRUNC %3(s32)
241    %4:_(s16) = G_OR %1, %0
242    %5:_(s32) = G_ANYEXT %4(s16)
243    $v0 = COPY %5(s32)
244    RetRA implicit $v0
245
246...
247---
248name:            or_i32
249alignment:       4
250tracksRegLiveness: true
251body:             |
252  bb.1.entry:
253    liveins: $a0, $a1
254
255    ; MIPS32-LABEL: name: or_i32
256    ; MIPS32: liveins: $a0, $a1
257    ; MIPS32-NEXT: {{  $}}
258    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
259    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
260    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]
261    ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)
262    ; MIPS32-NEXT: RetRA implicit $v0
263    %0:_(s32) = COPY $a0
264    %1:_(s32) = COPY $a1
265    %2:_(s32) = G_OR %1, %0
266    $v0 = COPY %2(s32)
267    RetRA implicit $v0
268
269...
270---
271name:            or_i64
272alignment:       4
273tracksRegLiveness: true
274body:             |
275  bb.1.entry:
276    liveins: $a0, $a1, $a2, $a3
277
278    ; MIPS32-LABEL: name: or_i64
279    ; MIPS32: liveins: $a0, $a1, $a2, $a3
280    ; MIPS32-NEXT: {{  $}}
281    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
282    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
283    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
284    ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
285    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY]]
286    ; MIPS32-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[COPY3]], [[COPY1]]
287    ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)
288    ; MIPS32-NEXT: $v1 = COPY [[OR1]](s32)
289    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
290    %2:_(s32) = COPY $a0
291    %3:_(s32) = COPY $a1
292    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
293    %4:_(s32) = COPY $a2
294    %5:_(s32) = COPY $a3
295    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
296    %6:_(s64) = G_OR %1, %0
297    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
298    $v0 = COPY %7(s32)
299    $v1 = COPY %8(s32)
300    RetRA implicit $v0, implicit $v1
301
302...
303---
304name:            xor_i1
305alignment:       4
306tracksRegLiveness: true
307body:             |
308  bb.1.entry:
309    liveins: $a0, $a1
310
311    ; MIPS32-LABEL: name: xor_i1
312    ; MIPS32: liveins: $a0, $a1
313    ; MIPS32-NEXT: {{  $}}
314    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
315    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
316    ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]
317    ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)
318    ; MIPS32-NEXT: RetRA implicit $v0
319    %2:_(s32) = COPY $a0
320    %0:_(s1) = G_TRUNC %2(s32)
321    %3:_(s32) = COPY $a1
322    %1:_(s1) = G_TRUNC %3(s32)
323    %4:_(s1) = G_XOR %1, %0
324    %5:_(s32) = G_ANYEXT %4(s1)
325    $v0 = COPY %5(s32)
326    RetRA implicit $v0
327
328...
329---
330name:            xor_i8
331alignment:       4
332tracksRegLiveness: true
333body:             |
334  bb.1.entry:
335    liveins: $a0, $a1
336
337    ; MIPS32-LABEL: name: xor_i8
338    ; MIPS32: liveins: $a0, $a1
339    ; MIPS32-NEXT: {{  $}}
340    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
341    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
342    ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]
343    ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)
344    ; MIPS32-NEXT: RetRA implicit $v0
345    %2:_(s32) = COPY $a0
346    %0:_(s8) = G_TRUNC %2(s32)
347    %3:_(s32) = COPY $a1
348    %1:_(s8) = G_TRUNC %3(s32)
349    %4:_(s8) = G_XOR %1, %0
350    %5:_(s32) = G_ANYEXT %4(s8)
351    $v0 = COPY %5(s32)
352    RetRA implicit $v0
353
354...
355---
356name:            xor_i16
357alignment:       4
358tracksRegLiveness: true
359body:             |
360  bb.1.entry:
361    liveins: $a0, $a1
362
363    ; MIPS32-LABEL: name: xor_i16
364    ; MIPS32: liveins: $a0, $a1
365    ; MIPS32-NEXT: {{  $}}
366    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
367    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
368    ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]
369    ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)
370    ; MIPS32-NEXT: RetRA implicit $v0
371    %2:_(s32) = COPY $a0
372    %0:_(s16) = G_TRUNC %2(s32)
373    %3:_(s32) = COPY $a1
374    %1:_(s16) = G_TRUNC %3(s32)
375    %4:_(s16) = G_XOR %1, %0
376    %5:_(s32) = G_ANYEXT %4(s16)
377    $v0 = COPY %5(s32)
378    RetRA implicit $v0
379
380...
381---
382name:            xor_i32
383alignment:       4
384tracksRegLiveness: true
385body:             |
386  bb.1.entry:
387    liveins: $a0, $a1
388
389    ; MIPS32-LABEL: name: xor_i32
390    ; MIPS32: liveins: $a0, $a1
391    ; MIPS32-NEXT: {{  $}}
392    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
393    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
394    ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]
395    ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)
396    ; MIPS32-NEXT: RetRA implicit $v0
397    %0:_(s32) = COPY $a0
398    %1:_(s32) = COPY $a1
399    %2:_(s32) = G_XOR %1, %0
400    $v0 = COPY %2(s32)
401    RetRA implicit $v0
402
403...
404---
405name:            xor_i64
406alignment:       4
407tracksRegLiveness: true
408body:             |
409  bb.1.entry:
410    liveins: $a0, $a1, $a2, $a3
411
412    ; MIPS32-LABEL: name: xor_i64
413    ; MIPS32: liveins: $a0, $a1, $a2, $a3
414    ; MIPS32-NEXT: {{  $}}
415    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
416    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
417    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
418    ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
419    ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY]]
420    ; MIPS32-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY3]], [[COPY1]]
421    ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)
422    ; MIPS32-NEXT: $v1 = COPY [[XOR1]](s32)
423    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
424    %2:_(s32) = COPY $a0
425    %3:_(s32) = COPY $a1
426    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
427    %4:_(s32) = COPY $a2
428    %5:_(s32) = COPY $a3
429    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
430    %6:_(s64) = G_XOR %1, %0
431    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
432    $v0 = COPY %7(s32)
433    $v1 = COPY %8(s32)
434    RetRA implicit $v0, implicit $v1
435
436...
437---
438name:            shl
439alignment:       4
440tracksRegLiveness: true
441body:             |
442  bb.1.entry:
443    liveins: $a0
444
445    ; MIPS32-LABEL: name: shl
446    ; MIPS32: liveins: $a0
447    ; MIPS32-NEXT: {{  $}}
448    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
449    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
450    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
451    ; MIPS32-NEXT: $v0 = COPY [[SHL]](s32)
452    ; MIPS32-NEXT: RetRA implicit $v0
453    %0:_(s32) = COPY $a0
454    %1:_(s32) = G_CONSTANT i32 1
455    %2:_(s32) = G_SHL %0, %1
456    $v0 = COPY %2(s32)
457    RetRA implicit $v0
458
459...
460---
461name:            ashr
462alignment:       4
463tracksRegLiveness: true
464body:             |
465  bb.1.entry:
466    liveins: $a0
467
468    ; MIPS32-LABEL: name: ashr
469    ; MIPS32: liveins: $a0
470    ; MIPS32-NEXT: {{  $}}
471    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
472    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
473    ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)
474    ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)
475    ; MIPS32-NEXT: RetRA implicit $v0
476    %0:_(s32) = COPY $a0
477    %1:_(s32) = G_CONSTANT i32 1
478    %2:_(s32) = G_ASHR %0, %1
479    $v0 = COPY %2(s32)
480    RetRA implicit $v0
481
482...
483---
484name:            lshr
485alignment:       4
486tracksRegLiveness: true
487body:             |
488  bb.1.entry:
489    liveins: $a0
490
491    ; MIPS32-LABEL: name: lshr
492    ; MIPS32: liveins: $a0
493    ; MIPS32-NEXT: {{  $}}
494    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
495    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
496    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
497    ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)
498    ; MIPS32-NEXT: RetRA implicit $v0
499    %0:_(s32) = COPY $a0
500    %1:_(s32) = G_CONSTANT i32 1
501    %2:_(s32) = G_LSHR %0, %1
502    $v0 = COPY %2(s32)
503    RetRA implicit $v0
504
505...
506---
507name:            lshr_i64_shift_amount
508alignment:       4
509tracksRegLiveness: true
510body:             |
511  bb.1.entry:
512    liveins: $a0
513
514    ; MIPS32-LABEL: name: lshr_i64_shift_amount
515    ; MIPS32: liveins: $a0
516    ; MIPS32-NEXT: {{  $}}
517    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
518    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
519    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
520    ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)
521    ; MIPS32-NEXT: RetRA implicit $v0
522    %0:_(s32) = COPY $a0
523    %1:_(s64) = G_CONSTANT i64 1
524    %2:_(s32) = G_LSHR %0, %1
525    $v0 = COPY %2(s32)
526    RetRA implicit $v0
527
528...
529---
530name:            shlv
531alignment:       4
532tracksRegLiveness: true
533body:             |
534  bb.1.entry:
535    liveins: $a0, $a1
536
537    ; MIPS32-LABEL: name: shlv
538    ; MIPS32: liveins: $a0, $a1
539    ; MIPS32-NEXT: {{  $}}
540    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
541    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
542    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]](s32)
543    ; MIPS32-NEXT: $v0 = COPY [[SHL]](s32)
544    ; MIPS32-NEXT: RetRA implicit $v0
545    %0:_(s32) = COPY $a0
546    %1:_(s32) = COPY $a1
547    %2:_(s32) = G_SHL %0, %1
548    $v0 = COPY %2(s32)
549    RetRA implicit $v0
550
551...
552---
553name:            ashrv
554alignment:       4
555tracksRegLiveness: true
556body:             |
557  bb.1.entry:
558    liveins: $a0, $a1
559
560    ; MIPS32-LABEL: name: ashrv
561    ; MIPS32: liveins: $a0, $a1
562    ; MIPS32-NEXT: {{  $}}
563    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
564    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
565    ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]](s32)
566    ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)
567    ; MIPS32-NEXT: RetRA implicit $v0
568    %0:_(s32) = COPY $a0
569    %1:_(s32) = COPY $a1
570    %2:_(s32) = G_ASHR %0, %1
571    $v0 = COPY %2(s32)
572    RetRA implicit $v0
573
574...
575---
576name:            lshrv
577alignment:       4
578tracksRegLiveness: true
579body:             |
580  bb.1.entry:
581    liveins: $a0, $a1
582
583    ; MIPS32-LABEL: name: lshrv
584    ; MIPS32: liveins: $a0, $a1
585    ; MIPS32-NEXT: {{  $}}
586    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
587    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
588    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]](s32)
589    ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)
590    ; MIPS32-NEXT: RetRA implicit $v0
591    %0:_(s32) = COPY $a0
592    %1:_(s32) = COPY $a1
593    %2:_(s32) = G_LSHR %0, %1
594    $v0 = COPY %2(s32)
595    RetRA implicit $v0
596
597...
598---
599name:            shl_i16
600alignment:       4
601tracksRegLiveness: true
602body:             |
603  bb.1.entry:
604    liveins: $a0
605
606    ; MIPS32-LABEL: name: shl_i16
607    ; MIPS32: liveins: $a0
608    ; MIPS32-NEXT: {{  $}}
609    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
610    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
611    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
612    ; MIPS32-NEXT: $v0 = COPY [[SHL]](s32)
613    ; MIPS32-NEXT: RetRA implicit $v0
614    %1:_(s32) = COPY $a0
615    %0:_(s16) = G_TRUNC %1(s32)
616    %2:_(s16) = G_CONSTANT i16 2
617    %3:_(s16) = G_SHL %0, %2(s16)
618    %4:_(s32) = G_ANYEXT %3(s16)
619    $v0 = COPY %4(s32)
620    RetRA implicit $v0
621
622...
623---
624name:            ashr_i8
625alignment:       4
626tracksRegLiveness: true
627body:             |
628  bb.1.entry:
629    liveins: $a0
630
631    ; MIPS32-LABEL: name: ashr_i8
632    ; MIPS32: liveins: $a0
633    ; MIPS32-NEXT: {{  $}}
634    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
635    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
636    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
637    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]](s32)
638    ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
639    ; MIPS32-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[C]](s32)
640    ; MIPS32-NEXT: $v0 = COPY [[ASHR1]](s32)
641    ; MIPS32-NEXT: RetRA implicit $v0
642    %1:_(s32) = COPY $a0
643    %0:_(s8) = G_TRUNC %1(s32)
644    %2:_(s8) = G_CONSTANT i8 2
645    %3:_(s8) = G_ASHR %0, %2(s8)
646    %4:_(s32) = G_ANYEXT %3(s8)
647    $v0 = COPY %4(s32)
648    RetRA implicit $v0
649
650...
651---
652name:            lshr_i16
653alignment:       4
654tracksRegLiveness: true
655body:             |
656  bb.1.entry:
657    liveins: $a0
658
659    ; MIPS32-LABEL: name: lshr_i16
660    ; MIPS32: liveins: $a0
661    ; MIPS32-NEXT: {{  $}}
662    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
663    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
664    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
665    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
666    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C]](s32)
667    ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)
668    ; MIPS32-NEXT: RetRA implicit $v0
669    %1:_(s32) = COPY $a0
670    %0:_(s16) = G_TRUNC %1(s32)
671    %2:_(s16) = G_CONSTANT i16 2
672    %3:_(s16) = G_LSHR %0, %2(s16)
673    %4:_(s32) = G_ANYEXT %3(s16)
674    $v0 = COPY %4(s32)
675    RetRA implicit $v0
676
677...
678---
679name:            shl_i64
680alignment:       4
681tracksRegLiveness: true
682body:             |
683  bb.1.entry:
684    liveins: $a0, $a1, $a2, $a3
685
686    ; MIPS32-LABEL: name: shl_i64
687    ; MIPS32: liveins: $a0, $a1, $a2, $a3
688    ; MIPS32-NEXT: {{  $}}
689    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
690    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
691    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
692    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
693    ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]
694    ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
695    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
696    ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]
697    ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]
698    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY2]](s32)
699    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB1]](s32)
700    ; MIPS32-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[COPY2]](s32)
701    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
702    ; MIPS32-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[SUB]](s32)
703    ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[SHL]], [[C1]]
704    ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[SHL2]]
705    ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY1]], [[SELECT1]]
706    ; MIPS32-NEXT: $v0 = COPY [[SELECT]](s32)
707    ; MIPS32-NEXT: $v1 = COPY [[SELECT2]](s32)
708    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
709    %2:_(s32) = COPY $a0
710    %3:_(s32) = COPY $a1
711    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
712    %4:_(s32) = COPY $a2
713    %5:_(s32) = COPY $a3
714    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
715    %6:_(s64) = G_SHL %0, %1(s64)
716    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
717    $v0 = COPY %7(s32)
718    $v1 = COPY %8(s32)
719    RetRA implicit $v0, implicit $v1
720
721...
722---
723name:            ashl_i64
724alignment:       4
725tracksRegLiveness: true
726body:             |
727  bb.1.entry:
728    liveins: $a0, $a1, $a2, $a3
729
730    ; MIPS32-LABEL: name: ashl_i64
731    ; MIPS32: liveins: $a0, $a1, $a2, $a3
732    ; MIPS32-NEXT: {{  $}}
733    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
734    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
735    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
736    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
737    ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]
738    ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
739    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
740    ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]
741    ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]
742    ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[COPY2]](s32)
743    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32)
744    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32)
745    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
746    ; MIPS32-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
747    ; MIPS32-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[C2]](s32)
748    ; MIPS32-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[SUB]](s32)
749    ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[ASHR2]]
750    ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY]], [[SELECT]]
751    ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[ASHR]], [[ASHR1]]
752    ; MIPS32-NEXT: $v0 = COPY [[SELECT1]](s32)
753    ; MIPS32-NEXT: $v1 = COPY [[SELECT2]](s32)
754    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
755    %2:_(s32) = COPY $a0
756    %3:_(s32) = COPY $a1
757    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
758    %4:_(s32) = COPY $a2
759    %5:_(s32) = COPY $a3
760    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
761    %6:_(s64) = G_ASHR %0, %1(s64)
762    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
763    $v0 = COPY %7(s32)
764    $v1 = COPY %8(s32)
765    RetRA implicit $v0, implicit $v1
766
767...
768---
769name:            lshr_i64
770alignment:       4
771tracksRegLiveness: true
772body:             |
773  bb.1.entry:
774    liveins: $a0, $a1, $a2, $a3
775
776    ; MIPS32-LABEL: name: lshr_i64
777    ; MIPS32: liveins: $a0, $a1, $a2, $a3
778    ; MIPS32-NEXT: {{  $}}
779    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
780    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
781    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
782    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
783    ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]
784    ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
785    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
786    ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]
787    ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]
788    ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[COPY2]](s32)
789    ; MIPS32-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32)
790    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32)
791    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]]
792    ; MIPS32-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB]](s32)
793    ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[LSHR2]]
794    ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY]], [[SELECT]]
795    ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[LSHR]], [[C1]]
796    ; MIPS32-NEXT: $v0 = COPY [[SELECT1]](s32)
797    ; MIPS32-NEXT: $v1 = COPY [[SELECT2]](s32)
798    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
799    %2:_(s32) = COPY $a0
800    %3:_(s32) = COPY $a1
801    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
802    %4:_(s32) = COPY $a2
803    %5:_(s32) = COPY $a3
804    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
805    %6:_(s64) = G_LSHR %0, %1(s64)
806    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
807    $v0 = COPY %7(s32)
808    $v1 = COPY %8(s32)
809    RetRA implicit $v0, implicit $v1
810
811...
812