xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir (revision 3a106e5b2cd9f4073b2961b991ebaeee96786309) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @add_i32() {entry: ret void}
6  define void @add_i8_sext() {entry: ret void}
7  define void @add_i8_zext() {entry: ret void}
8  define void @add_i8_aext() {entry: ret void}
9  define void @add_i16_sext() {entry: ret void}
10  define void @add_i16_zext() {entry: ret void}
11  define void @add_i16_aext() {entry: ret void}
12  define void @add_i64() {entry: ret void}
13  define void @add_i128() {entry: ret void}
14  define void @uadd_with_overflow(i32 %lhs, i32 %rhs, ptr %padd, ptr %pcarry_flag) { ret void }
15
16...
17---
18name:            add_i32
19alignment:       4
20tracksRegLiveness: true
21body:             |
22  bb.0.entry:
23    liveins: $a0, $a1
24
25    ; MIPS32-LABEL: name: add_i32
26    ; MIPS32: liveins: $a0, $a1
27    ; MIPS32-NEXT: {{  $}}
28    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
29    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
30    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
31    ; MIPS32-NEXT: $v0 = COPY [[ADD]](s32)
32    ; MIPS32-NEXT: RetRA implicit $v0
33    %0:_(s32) = COPY $a0
34    %1:_(s32) = COPY $a1
35    %2:_(s32) = G_ADD %0, %1
36    $v0 = COPY %2(s32)
37    RetRA implicit $v0
38
39...
40---
41name:            add_i8_sext
42alignment:       4
43tracksRegLiveness: true
44body:             |
45  bb.1.entry:
46    liveins: $a0, $a1
47
48    ; MIPS32-LABEL: name: add_i8_sext
49    ; MIPS32: liveins: $a0, $a1
50    ; MIPS32-NEXT: {{  $}}
51    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
52    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
53    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
54    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
55    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ADD]], [[C]](s32)
56    ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
57    ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)
58    ; MIPS32-NEXT: RetRA implicit $v0
59    %2:_(s32) = COPY $a0
60    %0:_(s8) = G_TRUNC %2(s32)
61    %3:_(s32) = COPY $a1
62    %1:_(s8) = G_TRUNC %3(s32)
63    %4:_(s8) = G_ADD %1, %0
64    %5:_(s32) = G_SEXT %4(s8)
65    $v0 = COPY %5(s32)
66    RetRA implicit $v0
67
68...
69---
70name:            add_i8_zext
71alignment:       4
72tracksRegLiveness: true
73body:             |
74  bb.1.entry:
75    liveins: $a0, $a1
76
77    ; MIPS32-LABEL: name: add_i8_zext
78    ; MIPS32: liveins: $a0, $a1
79    ; MIPS32-NEXT: {{  $}}
80    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
81    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
82    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
83    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
84    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C]]
85    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
86    ; MIPS32-NEXT: RetRA implicit $v0
87    %2:_(s32) = COPY $a0
88    %0:_(s8) = G_TRUNC %2(s32)
89    %3:_(s32) = COPY $a1
90    %1:_(s8) = G_TRUNC %3(s32)
91    %4:_(s8) = G_ADD %1, %0
92    %5:_(s32) = G_ZEXT %4(s8)
93    $v0 = COPY %5(s32)
94    RetRA implicit $v0
95
96...
97---
98name:            add_i8_aext
99alignment:       4
100tracksRegLiveness: true
101body:             |
102  bb.1.entry:
103    liveins: $a0, $a1
104
105    ; MIPS32-LABEL: name: add_i8_aext
106    ; MIPS32: liveins: $a0, $a1
107    ; MIPS32-NEXT: {{  $}}
108    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
109    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
110    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
111    ; MIPS32-NEXT: $v0 = COPY [[ADD]](s32)
112    ; MIPS32-NEXT: RetRA implicit $v0
113    %2:_(s32) = COPY $a0
114    %0:_(s8) = G_TRUNC %2(s32)
115    %3:_(s32) = COPY $a1
116    %1:_(s8) = G_TRUNC %3(s32)
117    %4:_(s8) = G_ADD %1, %0
118    %5:_(s32) = G_ANYEXT %4(s8)
119    $v0 = COPY %5(s32)
120    RetRA implicit $v0
121
122...
123---
124name:            add_i16_sext
125alignment:       4
126tracksRegLiveness: true
127body:             |
128  bb.1.entry:
129    liveins: $a0, $a1
130
131    ; MIPS32-LABEL: name: add_i16_sext
132    ; MIPS32: liveins: $a0, $a1
133    ; MIPS32-NEXT: {{  $}}
134    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
135    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
136    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
137    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
138    ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ADD]], [[C]](s32)
139    ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
140    ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)
141    ; MIPS32-NEXT: RetRA implicit $v0
142    %2:_(s32) = COPY $a0
143    %0:_(s16) = G_TRUNC %2(s32)
144    %3:_(s32) = COPY $a1
145    %1:_(s16) = G_TRUNC %3(s32)
146    %4:_(s16) = G_ADD %1, %0
147    %5:_(s32) = G_SEXT %4(s16)
148    $v0 = COPY %5(s32)
149    RetRA implicit $v0
150
151...
152---
153name:            add_i16_zext
154alignment:       4
155tracksRegLiveness: true
156body:             |
157  bb.1.entry:
158    liveins: $a0, $a1
159
160    ; MIPS32-LABEL: name: add_i16_zext
161    ; MIPS32: liveins: $a0, $a1
162    ; MIPS32-NEXT: {{  $}}
163    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
164    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
165    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
166    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
167    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C]]
168    ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
169    ; MIPS32-NEXT: RetRA implicit $v0
170    %2:_(s32) = COPY $a0
171    %0:_(s16) = G_TRUNC %2(s32)
172    %3:_(s32) = COPY $a1
173    %1:_(s16) = G_TRUNC %3(s32)
174    %4:_(s16) = G_ADD %1, %0
175    %5:_(s32) = G_ZEXT %4(s16)
176    $v0 = COPY %5(s32)
177    RetRA implicit $v0
178
179...
180---
181name:            add_i16_aext
182alignment:       4
183tracksRegLiveness: true
184body:             |
185  bb.1.entry:
186    liveins: $a0, $a1
187
188    ; MIPS32-LABEL: name: add_i16_aext
189    ; MIPS32: liveins: $a0, $a1
190    ; MIPS32-NEXT: {{  $}}
191    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
192    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
193    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
194    ; MIPS32-NEXT: $v0 = COPY [[ADD]](s32)
195    ; MIPS32-NEXT: RetRA implicit $v0
196    %2:_(s32) = COPY $a0
197    %0:_(s16) = G_TRUNC %2(s32)
198    %3:_(s32) = COPY $a1
199    %1:_(s16) = G_TRUNC %3(s32)
200    %4:_(s16) = G_ADD %1, %0
201    %5:_(s32) = G_ANYEXT %4(s16)
202    $v0 = COPY %5(s32)
203    RetRA implicit $v0
204
205...
206---
207name:            add_i64
208alignment:       4
209tracksRegLiveness: true
210body:             |
211  bb.1.entry:
212    liveins: $a0, $a1, $a2, $a3
213
214    ; MIPS32-LABEL: name: add_i64
215    ; MIPS32: liveins: $a0, $a1, $a2, $a3
216    ; MIPS32-NEXT: {{  $}}
217    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
218    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
219    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
220    ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
221    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY3]], [[COPY1]]
222    ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[ADD]](s32), [[COPY1]]
223    ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
224    ; MIPS32-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY2]], [[COPY]]
225    ; MIPS32-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[ADD1]], [[ICMP]]
226    ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ADD2]](s32)
227    ; MIPS32-NEXT: $v0 = COPY [[COPY5]](s32)
228    ; MIPS32-NEXT: $v1 = COPY [[COPY4]](s32)
229    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
230    %2:_(s32) = COPY $a0
231    %3:_(s32) = COPY $a1
232    %0:_(s64) = G_MERGE_VALUES %3(s32), %2(s32)
233    %4:_(s32) = COPY $a2
234    %5:_(s32) = COPY $a3
235    %1:_(s64) = G_MERGE_VALUES %5(s32), %4(s32)
236    %6:_(s64) = G_ADD %1, %0
237    %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
238    $v0 = COPY %8(s32)
239    $v1 = COPY %7(s32)
240    RetRA implicit $v0, implicit $v1
241
242...
243---
244name:            add_i128
245alignment:       4
246tracksRegLiveness: true
247fixedStack:
248  - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: default, isImmutable: true }
249  - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: default, isImmutable: true }
250  - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: default, isImmutable: true }
251  - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
252body:             |
253  bb.1.entry:
254    liveins: $a0, $a1, $a2, $a3
255
256    ; MIPS32-LABEL: name: add_i128
257    ; MIPS32: liveins: $a0, $a1, $a2, $a3
258    ; MIPS32-NEXT: {{  $}}
259    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
260    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
261    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
262    ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
263    ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
264    ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0)
265    ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
266    ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.1)
267    ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2
268    ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %fixed-stack.2)
269    ; MIPS32-NEXT: [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3
270    ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p0) :: (load (s32) from %fixed-stack.3)
271    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[COPY]]
272    ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[ADD]](s32), [[COPY]]
273    ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
274    ; MIPS32-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LOAD1]], [[COPY1]]
275    ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[ADD1]](s32), [[LOAD1]]
276    ; MIPS32-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[ADD1]], [[ICMP]]
277    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
278    ; MIPS32-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[ADD2]](s32), [[C]]
279    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[ICMP]]
280    ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[ICMP1]], [[AND]]
281    ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ADD2]](s32)
282    ; MIPS32-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[LOAD2]], [[COPY2]]
283    ; MIPS32-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[ADD3]](s32), [[LOAD2]]
284    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
285    ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[OR]], [[C1]]
286    ; MIPS32-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[ADD3]], [[AND1]]
287    ; MIPS32-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[ADD4]](s32), [[C]]
288    ; MIPS32-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP4]], [[OR]]
289    ; MIPS32-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ICMP3]], [[AND2]]
290    ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ADD4]](s32)
291    ; MIPS32-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[LOAD3]], [[COPY3]]
292    ; MIPS32-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[OR1]], [[C1]]
293    ; MIPS32-NEXT: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[ADD5]], [[AND3]]
294    ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ADD6]](s32)
295    ; MIPS32-NEXT: $v0 = COPY [[COPY4]](s32)
296    ; MIPS32-NEXT: $v1 = COPY [[COPY5]](s32)
297    ; MIPS32-NEXT: $a0 = COPY [[COPY6]](s32)
298    ; MIPS32-NEXT: $a1 = COPY [[COPY7]](s32)
299    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1, implicit $a0, implicit $a1
300    %2:_(s32) = COPY $a0
301    %3:_(s32) = COPY $a1
302    %4:_(s32) = COPY $a2
303    %5:_(s32) = COPY $a3
304    %0:_(s128) = G_MERGE_VALUES %2(s32), %3(s32), %4(s32), %5(s32)
305    %10:_(p0) = G_FRAME_INDEX %fixed-stack.3
306    %6:_(s32) = G_LOAD %10(p0) :: (load (s32) from %fixed-stack.3, align 4)
307    %11:_(p0) = G_FRAME_INDEX %fixed-stack.2
308    %7:_(s32) = G_LOAD %11(p0) :: (load (s32) from %fixed-stack.2, align 4)
309    %12:_(p0) = G_FRAME_INDEX %fixed-stack.1
310    %8:_(s32) = G_LOAD %12(p0) :: (load (s32) from %fixed-stack.1, align 4)
311    %13:_(p0) = G_FRAME_INDEX %fixed-stack.0
312    %9:_(s32) = G_LOAD %13(p0) :: (load (s32) from %fixed-stack.0, align 4)
313    %1:_(s128) = G_MERGE_VALUES %6(s32), %7(s32), %8(s32), %9(s32)
314    %14:_(s128) = G_ADD %1, %0
315    %15:_(s32), %16:_(s32), %17:_(s32), %18:_(s32) = G_UNMERGE_VALUES %14(s128)
316    $v0 = COPY %15(s32)
317    $v1 = COPY %16(s32)
318    $a0 = COPY %17(s32)
319    $a1 = COPY %18(s32)
320    RetRA implicit $v0, implicit $v1, implicit $a0, implicit $a1
321
322...
323---
324name:            uadd_with_overflow
325alignment:       4
326tracksRegLiveness: true
327body:             |
328  bb.1 (%ir-block.0):
329    liveins: $a0, $a1, $a2, $a3
330
331    ; MIPS32-LABEL: name: uadd_with_overflow
332    ; MIPS32: liveins: $a0, $a1, $a2, $a3
333    ; MIPS32-NEXT: {{  $}}
334    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
335    ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
336    ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
337    ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(p0) = COPY $a3
338    ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
339    ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[ADD]](s32), [[COPY1]]
340    ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
341    ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
342    ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C]]
343    ; MIPS32-NEXT: G_STORE [[AND]](s32), [[COPY3]](p0) :: (store (s8) into %ir.pcarry_flag)
344    ; MIPS32-NEXT: G_STORE [[COPY4]](s32), [[COPY2]](p0) :: (store (s32) into %ir.padd)
345    ; MIPS32-NEXT: RetRA
346    %0:_(s32) = COPY $a0
347    %1:_(s32) = COPY $a1
348    %2:_(p0) = COPY $a2
349    %3:_(p0) = COPY $a3
350    %4:_(s32), %5:_(s1) = G_UADDO %0, %1
351    G_STORE %5(s1), %3(p0) :: (store (s1) into %ir.pcarry_flag)
352    G_STORE %4(s32), %2(p0) :: (store (s32) into %ir.padd)
353    RetRA
354
355...
356