1; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 2 3define i64 @i64_reg(i64 %a) { 4 ; MIPS32-LABEL: name: i64_reg 5 ; MIPS32: bb.1.entry: 6 ; MIPS32: liveins: $a0, $a1 7 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 8 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 9 ; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 10 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64) 11 ; MIPS32: $v0 = COPY [[UV]](s32) 12 ; MIPS32: $v1 = COPY [[UV1]](s32) 13 ; MIPS32: RetRA implicit $v0, implicit $v1 14entry: 15 ret i64 %a 16} 17 18define i64 @i64_stack(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i64 %a) { 19 ; MIPS32-LABEL: name: i64_stack 20 ; MIPS32: fixedStack: 21 ; MIPS32-DAG: - { id: [[STACK0:[0-9]+]], type: default, offset: 20, size: 4, alignment: 4, 22 ; MIPS32-DAG: - { id: [[STACK1:[0-9]+]], type: default, offset: 16, size: 4, alignment: 8, 23 ; MIPS32: bb.1.entry: 24 ; MIPS32: liveins: $a0, $a1, $a2, $a3 25 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 26 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 27 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 28 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 29 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1 30 ; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.[[STACK1]], align 8) 31 ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0 32 ; MIPS32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.[[STACK0]]) 33 ; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 34 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64) 35 ; MIPS32: $v0 = COPY [[UV]](s32) 36 ; MIPS32: $v1 = COPY [[UV1]](s32) 37 ; MIPS32: RetRA implicit $v0, implicit $v1 38entry: 39 ret i64 %a 40} 41 42define i64 @i64_reg_allign(i32 %a0, i64 %a) { 43 ; MIPS32-LABEL: name: i64_reg_allign 44 ; MIPS32: bb.1.entry: 45 ; MIPS32: liveins: $a0, $a2, $a3 46 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 47 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2 48 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3 49 ; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32) 50 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64) 51 ; MIPS32: $v0 = COPY [[UV]](s32) 52 ; MIPS32: $v1 = COPY [[UV1]](s32) 53 ; MIPS32: RetRA implicit $v0, implicit $v1 54entry: 55 ret i64 %a 56} 57 58define i64 @i64_stack_allign(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %s16, i64 %a) { 59 ; MIPS32-LABEL: name: i64_stack_allign 60 ; MIPS32: fixedStack: 61 ; MIPS32-DAG: - { id: [[STACK0:[0-9]+]], type: default, offset: 28, size: 4, alignment: 4, 62 ; MIPS32-DAG: - { id: [[STACK1:[0-9]+]], type: default, offset: 24, size: 4, alignment: 8, 63 ; MIPS32-DAG: - { id: [[STACK2:[0-9]+]], type: default, offset: 16, size: 4, alignment: 8, 64 ; MIPS32: bb.1.entry: 65 ; MIPS32: liveins: $a0, $a1, $a2, $a3 66 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 67 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 68 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 69 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 70 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2 71 ; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.[[STACK2]], align 8) 72 ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1 73 ; MIPS32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.[[STACK1]], align 8) 74 ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0 75 ; MIPS32: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %fixed-stack.[[STACK0]]) 76 ; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD1]](s32), [[LOAD2]](s32) 77 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64) 78 ; MIPS32: $v0 = COPY [[UV]](s32) 79 ; MIPS32: $v1 = COPY [[UV1]](s32) 80 ; MIPS32: RetRA implicit $v0, implicit $v1 81entry: 82 ret i64 %a 83} 84 85define i64 @i64_reg_stack(i32 %a0, i32 %a1, i32 %a2, i64 %a) { 86 ; MIPS32-LABEL: name: i64_reg_stack 87 ; MIPS32: fixedStack: 88 ; MIPS32-DAG: - { id: [[STACK0:[0-9]+]], type: default, offset: 20, size: 4, alignment: 4, 89 ; MIPS32-DAG: - { id: [[STACK1:[0-9]+]], type: default, offset: 16, size: 4, alignment: 8, 90 ; MIPS32: bb.1.entry: 91 ; MIPS32: liveins: $a0, $a1, $a2 92 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 93 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 94 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 95 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1 96 ; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.[[STACK1]], align 8) 97 ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0 98 ; MIPS32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.[[STACK0]]) 99 ; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 100 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64) 101 ; MIPS32: $v0 = COPY [[UV]](s32) 102 ; MIPS32: $v1 = COPY [[UV1]](s32) 103 ; MIPS32: RetRA implicit $v0, implicit $v1 104entry: 105 ret i64 %a 106} 107