xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/bitwise.ll (revision 150fd430f66b2f87e3d4c17334bfd7c5ae0db6d7)
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3
4define i32 @shl(i32 %a) {
5  ; MIPS32-LABEL: name: shl
6  ; MIPS32: bb.1.entry:
7  ; MIPS32:   liveins: $a0
8  ; MIPS32:   [[COPY:%[0-9]+]]:_(s32) = COPY $a0
9  ; MIPS32:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
10  ; MIPS32:   [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]]
11  ; MIPS32:   $v0 = COPY [[SHL]](s32)
12  ; MIPS32:   RetRA implicit $v0
13entry:
14  %shl = shl i32 %a, 1
15  ret i32 %shl
16}
17
18define i32 @ashr(i32 %a) {
19  ; MIPS32-LABEL: name: ashr
20  ; MIPS32: bb.1.entry:
21  ; MIPS32:   liveins: $a0
22  ; MIPS32:   [[COPY:%[0-9]+]]:_(s32) = COPY $a0
23  ; MIPS32:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
24  ; MIPS32:   [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]]
25  ; MIPS32:   $v0 = COPY [[ASHR]](s32)
26  ; MIPS32:   RetRA implicit $v0
27entry:
28  %shr = ashr i32 %a, 1
29  ret i32 %shr
30}
31
32define i32 @lshr(i32 %a) {
33  ; MIPS32-LABEL: name: lshr
34  ; MIPS32: bb.1.entry:
35  ; MIPS32:   liveins: $a0
36  ; MIPS32:   [[COPY:%[0-9]+]]:_(s32) = COPY $a0
37  ; MIPS32:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
38  ; MIPS32:   [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]]
39  ; MIPS32:   $v0 = COPY [[LSHR]](s32)
40  ; MIPS32:   RetRA implicit $v0
41entry:
42  %shr = lshr i32 %a, 1
43  ret i32 %shr
44}
45
46define i32 @shlv(i32 %a, i32 %b) {
47  ; MIPS32-LABEL: name: shlv
48  ; MIPS32: bb.1.entry:
49  ; MIPS32:   liveins: $a0, $a1
50  ; MIPS32:   [[COPY:%[0-9]+]]:_(s32) = COPY $a0
51  ; MIPS32:   [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
52  ; MIPS32:   [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]]
53  ; MIPS32:   $v0 = COPY [[SHL]](s32)
54  ; MIPS32:   RetRA implicit $v0
55entry:
56  %shl = shl i32 %a, %b
57  ret i32 %shl
58}
59
60define i32 @ashrv(i32 %a, i32 %b) {
61  ; MIPS32-LABEL: name: ashrv
62  ; MIPS32: bb.1.entry:
63  ; MIPS32:   liveins: $a0, $a1
64  ; MIPS32:   [[COPY:%[0-9]+]]:_(s32) = COPY $a0
65  ; MIPS32:   [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
66  ; MIPS32:   [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]]
67  ; MIPS32:   $v0 = COPY [[ASHR]](s32)
68  ; MIPS32:   RetRA implicit $v0
69entry:
70  %shr = ashr i32 %a, %b
71  ret i32 %shr
72}
73
74define i32 @lshrv(i32 %a, i32 %b) {
75  ; MIPS32-LABEL: name: lshrv
76  ; MIPS32: bb.1.entry:
77  ; MIPS32:   liveins: $a0, $a1
78  ; MIPS32:   [[COPY:%[0-9]+]]:_(s32) = COPY $a0
79  ; MIPS32:   [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
80  ; MIPS32:   [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]]
81  ; MIPS32:   $v0 = COPY [[LSHR]](s32)
82  ; MIPS32:   RetRA implicit $v0
83entry:
84  %shr = lshr i32 %a, %b
85  ret i32 %shr
86}
87
88