1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3--- | 4 5 define void @load_store_i8(ptr %px, ptr %py) {entry: ret void} 6 define void @load_store_i16(ptr %px, ptr %py) {entry: ret void} 7 define void @load_store_i32(ptr %px, ptr %py) {entry: ret void} 8 9... 10--- 11name: load_store_i8 12alignment: 4 13legalized: true 14regBankSelected: true 15tracksRegLiveness: true 16body: | 17 bb.1.entry: 18 liveins: $a0, $a1 19 20 ; MIPS32-LABEL: name: load_store_i8 21 ; MIPS32: liveins: $a0, $a1 22 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 23 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 24 ; MIPS32: [[LBu:%[0-9]+]]:gpr32 = LBu [[COPY1]], 0 :: (load (s8) from %ir.py) 25 ; MIPS32: SB [[LBu]], [[COPY]], 0 :: (store (s8) into %ir.px) 26 ; MIPS32: RetRA 27 %0:gprb(p0) = COPY $a0 28 %1:gprb(p0) = COPY $a1 29 %4:gprb(s32) = G_LOAD %1(p0) :: (load (s8) from %ir.py) 30 %3:gprb(s32) = COPY %4(s32) 31 G_STORE %3(s32), %0(p0) :: (store (s8) into %ir.px) 32 RetRA 33 34... 35--- 36name: load_store_i16 37alignment: 4 38legalized: true 39regBankSelected: true 40tracksRegLiveness: true 41body: | 42 bb.1.entry: 43 liveins: $a0, $a1 44 45 ; MIPS32-LABEL: name: load_store_i16 46 ; MIPS32: liveins: $a0, $a1 47 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 48 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 49 ; MIPS32: [[LHu:%[0-9]+]]:gpr32 = LHu [[COPY1]], 0 :: (load (s16) from %ir.py) 50 ; MIPS32: SH [[LHu]], [[COPY]], 0 :: (store (s16) into %ir.px) 51 ; MIPS32: RetRA 52 %0:gprb(p0) = COPY $a0 53 %1:gprb(p0) = COPY $a1 54 %4:gprb(s32) = G_LOAD %1(p0) :: (load (s16) from %ir.py) 55 %3:gprb(s32) = COPY %4(s32) 56 G_STORE %3(s32), %0(p0) :: (store (s16) into %ir.px) 57 RetRA 58 59... 60--- 61name: load_store_i32 62alignment: 4 63legalized: true 64regBankSelected: true 65tracksRegLiveness: true 66body: | 67 bb.1.entry: 68 liveins: $a0, $a1 69 70 ; MIPS32-LABEL: name: load_store_i32 71 ; MIPS32: liveins: $a0, $a1 72 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 73 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 74 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY1]], 0 :: (load (s32) from %ir.py) 75 ; MIPS32: SW [[LW]], [[COPY]], 0 :: (store (s32) into %ir.px) 76 ; MIPS32: RetRA 77 %0:gprb(p0) = COPY $a0 78 %1:gprb(p0) = COPY $a1 79 %2:gprb(s32) = G_LOAD %1(p0) :: (load (s32) from %ir.py) 80 G_STORE %2(s32), %0(p0) :: (store (s32) into %ir.px) 81 RetRA 82 83... 84