xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/select.mir (revision fae05692a36f9ebbd201d93c2a6b0f927564d7e6) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP32
3# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP64
4--- |
5
6  define void @select_i32() {entry: ret void}
7  define void @select_ptr() {entry: ret void}
8  define void @select_float() {entry: ret void}
9  define void @select_double() {entry: ret void}
10
11...
12---
13name:            select_i32
14alignment:       4
15legalized:       true
16regBankSelected: true
17tracksRegLiveness: true
18body:             |
19  bb.1.entry:
20    liveins: $a0, $a1, $a2
21
22    ; MIPS32FP32-LABEL: name: select_i32
23    ; MIPS32FP32: liveins: $a0, $a1, $a2
24    ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
25    ; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
26    ; MIPS32FP32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
27    ; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
28    ; MIPS32FP32: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
29    ; MIPS32FP32: $v0 = COPY [[MOVN_I_I]]
30    ; MIPS32FP32: RetRA implicit $v0
31    ; MIPS32FP64-LABEL: name: select_i32
32    ; MIPS32FP64: liveins: $a0, $a1, $a2
33    ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
34    ; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
35    ; MIPS32FP64: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
36    ; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
37    ; MIPS32FP64: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
38    ; MIPS32FP64: $v0 = COPY [[MOVN_I_I]]
39    ; MIPS32FP64: RetRA implicit $v0
40    %3:gprb(s32) = COPY $a0
41    %1:gprb(s32) = COPY $a1
42    %2:gprb(s32) = COPY $a2
43    %6:gprb(s32) = G_CONSTANT i32 1
44    %7:gprb(s32) = COPY %3(s32)
45    %5:gprb(s32) = G_AND %7, %6
46    %4:gprb(s32) = G_SELECT %5(s32), %1, %2
47    $v0 = COPY %4(s32)
48    RetRA implicit $v0
49
50...
51---
52name:            select_ptr
53alignment:       4
54legalized:       true
55regBankSelected: true
56tracksRegLiveness: true
57body:             |
58  bb.1.entry:
59    liveins: $a0, $a1, $a2
60
61    ; MIPS32FP32-LABEL: name: select_ptr
62    ; MIPS32FP32: liveins: $a0, $a1, $a2
63    ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
64    ; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
65    ; MIPS32FP32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
66    ; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
67    ; MIPS32FP32: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
68    ; MIPS32FP32: $v0 = COPY [[MOVN_I_I]]
69    ; MIPS32FP32: RetRA implicit $v0
70    ; MIPS32FP64-LABEL: name: select_ptr
71    ; MIPS32FP64: liveins: $a0, $a1, $a2
72    ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
73    ; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
74    ; MIPS32FP64: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
75    ; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
76    ; MIPS32FP64: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
77    ; MIPS32FP64: $v0 = COPY [[MOVN_I_I]]
78    ; MIPS32FP64: RetRA implicit $v0
79    %3:gprb(s32) = COPY $a0
80    %1:gprb(p0) = COPY $a1
81    %2:gprb(p0) = COPY $a2
82    %6:gprb(s32) = G_CONSTANT i32 1
83    %7:gprb(s32) = COPY %3(s32)
84    %5:gprb(s32) = G_AND %7, %6
85    %4:gprb(p0) = G_SELECT %5(s32), %1, %2
86    $v0 = COPY %4(p0)
87    RetRA implicit $v0
88
89...
90---
91name:            select_float
92alignment:       4
93legalized:       true
94regBankSelected: true
95tracksRegLiveness: true
96body:             |
97  bb.1.entry:
98    liveins: $a0, $a1, $a2
99
100    ; MIPS32FP32-LABEL: name: select_float
101    ; MIPS32FP32: liveins: $a0, $a1, $a2
102    ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
103    ; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
104    ; MIPS32FP32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
105    ; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
106    ; MIPS32FP32: [[COPY3:%[0-9]+]]:fgr32 = COPY [[COPY1]]
107    ; MIPS32FP32: [[COPY4:%[0-9]+]]:fgr32 = COPY [[COPY2]]
108    ; MIPS32FP32: [[MOVN_I_S:%[0-9]+]]:fgr32 = MOVN_I_S [[COPY3]], [[ANDi]], [[COPY4]]
109    ; MIPS32FP32: $f0 = COPY [[MOVN_I_S]]
110    ; MIPS32FP32: RetRA implicit $f0
111    ; MIPS32FP64-LABEL: name: select_float
112    ; MIPS32FP64: liveins: $a0, $a1, $a2
113    ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
114    ; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
115    ; MIPS32FP64: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
116    ; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
117    ; MIPS32FP64: [[COPY3:%[0-9]+]]:fgr32 = COPY [[COPY1]]
118    ; MIPS32FP64: [[COPY4:%[0-9]+]]:fgr32 = COPY [[COPY2]]
119    ; MIPS32FP64: [[MOVN_I_S:%[0-9]+]]:fgr32 = MOVN_I_S [[COPY3]], [[ANDi]], [[COPY4]]
120    ; MIPS32FP64: $f0 = COPY [[MOVN_I_S]]
121    ; MIPS32FP64: RetRA implicit $f0
122    %3:gprb(s32) = COPY $a0
123    %1:gprb(s32) = COPY $a1
124    %2:gprb(s32) = COPY $a2
125    %6:gprb(s32) = G_CONSTANT i32 1
126    %7:gprb(s32) = COPY %3(s32)
127    %5:gprb(s32) = G_AND %7, %6
128    %8:fprb(s32) = COPY %1(s32)
129    %9:fprb(s32) = COPY %2(s32)
130    %4:fprb(s32) = G_SELECT %5(s32), %8, %9
131    $f0 = COPY %4(s32)
132    RetRA implicit $f0
133
134...
135---
136name:            select_double
137alignment:       4
138legalized:       true
139regBankSelected: true
140tracksRegLiveness: true
141fixedStack:
142  - { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true }
143body:             |
144  bb.1.entry:
145    liveins: $d6, $d7
146
147    ; MIPS32FP32-LABEL: name: select_double
148    ; MIPS32FP32: liveins: $d6, $d7
149    ; MIPS32FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
150    ; MIPS32FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
151    ; MIPS32FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0
152    ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (s32) from %fixed-stack.0, align 8)
153    ; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
154    ; MIPS32FP32: [[MOVN_I_D32_:%[0-9]+]]:afgr64 = MOVN_I_D32 [[COPY]], [[ANDi]], [[COPY1]]
155    ; MIPS32FP32: $d0 = COPY [[MOVN_I_D32_]]
156    ; MIPS32FP32: RetRA implicit $d0
157    ; MIPS32FP64-LABEL: name: select_double
158    ; MIPS32FP64: liveins: $d6, $d7
159    ; MIPS32FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
160    ; MIPS32FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
161    ; MIPS32FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0
162    ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (s32) from %fixed-stack.0, align 8)
163    ; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
164    ; MIPS32FP64: [[MOVN_I_D64_:%[0-9]+]]:fgr64 = MOVN_I_D64 [[COPY]], [[ANDi]], [[COPY1]]
165    ; MIPS32FP64: $d0 = COPY [[MOVN_I_D64_]]
166    ; MIPS32FP64: RetRA implicit $d0
167    %0:fprb(s64) = COPY $d6
168    %1:fprb(s64) = COPY $d7
169    %4:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
170    %3:gprb(s32) = G_LOAD %4(p0) :: (load (s32) from %fixed-stack.0, align 8)
171    %7:gprb(s32) = G_CONSTANT i32 1
172    %8:gprb(s32) = COPY %3(s32)
173    %6:gprb(s32) = G_AND %8, %7
174    %5:fprb(s64) = G_SELECT %6(s32), %0, %1
175    $d0 = COPY %5(s64)
176    RetRA implicit $d0
177
178...
179