1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3--- | 4 5 define void @_16_bit_positive_offset() {entry: ret void} 6 define void @_16_bit_negative_offset() {entry: ret void} 7 define void @_large_positive_offset() {entry: ret void} 8 define void @_large_negative_offset() {entry: ret void} 9 define void @fold_f32_load() {entry: ret void} 10 define void @fold_f64_store() {entry: ret void} 11 define void @fold_i16_load() {entry: ret void} 12 define void @fold_i32_store() {entry: ret void} 13 14... 15--- 16name: _16_bit_positive_offset 17alignment: 4 18legalized: true 19regBankSelected: true 20tracksRegLiveness: true 21body: | 22 bb.1.entry: 23 liveins: $a0 24 25 ; MIPS32-LABEL: name: _16_bit_positive_offset 26 ; MIPS32: liveins: $a0 27 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 28 ; MIPS32: [[LBu:%[0-9]+]]:gpr32 = LBu [[COPY]], 32767 :: (load (s8)) 29 ; MIPS32: $v0 = COPY [[LBu]] 30 ; MIPS32: RetRA implicit $v0 31 %0:gprb(p0) = COPY $a0 32 %1:gprb(s32) = G_CONSTANT i32 32767 33 %2:gprb(p0) = G_PTR_ADD %0, %1(s32) 34 %4:gprb(s32) = G_ZEXTLOAD %2(p0) :: (load (s8)) 35 $v0 = COPY %4(s32) 36 RetRA implicit $v0 37 38... 39--- 40name: _16_bit_negative_offset 41alignment: 4 42legalized: true 43regBankSelected: true 44tracksRegLiveness: true 45body: | 46 bb.1.entry: 47 liveins: $a0, $a1 48 49 ; MIPS32-LABEL: name: _16_bit_negative_offset 50 ; MIPS32: liveins: $a0, $a1 51 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 52 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 53 ; MIPS32: SB [[COPY]], [[COPY1]], -32768 :: (store (s8)) 54 ; MIPS32: RetRA 55 %2:gprb(s32) = COPY $a0 56 %1:gprb(p0) = COPY $a1 57 %3:gprb(s32) = G_CONSTANT i32 -32768 58 %4:gprb(p0) = G_PTR_ADD %1, %3(s32) 59 %5:gprb(s32) = COPY %2(s32) 60 G_STORE %5(s32), %4(p0) :: (store (s8)) 61 RetRA 62 63... 64--- 65name: _large_positive_offset 66alignment: 4 67legalized: true 68regBankSelected: true 69tracksRegLiveness: true 70body: | 71 bb.1.entry: 72 liveins: $a0, $a1 73 74 ; MIPS32-LABEL: name: _large_positive_offset 75 ; MIPS32: liveins: $a0, $a1 76 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 77 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 78 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 32768 79 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY1]], [[ORi]] 80 ; MIPS32: SB [[COPY]], [[ADDu]], 0 :: (store (s8)) 81 ; MIPS32: RetRA 82 %2:gprb(s32) = COPY $a0 83 %1:gprb(p0) = COPY $a1 84 %3:gprb(s32) = G_CONSTANT i32 32768 85 %4:gprb(p0) = G_PTR_ADD %1, %3(s32) 86 %5:gprb(s32) = COPY %2(s32) 87 G_STORE %5(s32), %4(p0) :: (store (s8)) 88 RetRA 89 90... 91--- 92name: _large_negative_offset 93alignment: 4 94legalized: true 95regBankSelected: true 96tracksRegLiveness: true 97body: | 98 bb.1.entry: 99 liveins: $a0 100 101 ; MIPS32-LABEL: name: _large_negative_offset 102 ; MIPS32: liveins: $a0 103 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 104 ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 65535 105 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 32767 106 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[ORi]] 107 ; MIPS32: [[LB:%[0-9]+]]:gpr32 = LB [[ADDu]], 0 :: (load (s8)) 108 ; MIPS32: $v0 = COPY [[LB]] 109 ; MIPS32: RetRA implicit $v0 110 %0:gprb(p0) = COPY $a0 111 %1:gprb(s32) = G_CONSTANT i32 -32769 112 %2:gprb(p0) = G_PTR_ADD %0, %1(s32) 113 %4:gprb(s32) = G_SEXTLOAD %2(p0) :: (load (s8)) 114 $v0 = COPY %4(s32) 115 RetRA implicit $v0 116 117... 118--- 119name: fold_f32_load 120alignment: 4 121legalized: true 122regBankSelected: true 123tracksRegLiveness: true 124body: | 125 bb.1.entry: 126 liveins: $a0 127 128 ; MIPS32-LABEL: name: fold_f32_load 129 ; MIPS32: liveins: $a0 130 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 131 ; MIPS32: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[COPY]], 40 :: (load (s32)) 132 ; MIPS32: $f0 = COPY [[LWC1_]] 133 ; MIPS32: RetRA implicit $f0 134 %0:gprb(p0) = COPY $a0 135 %1:gprb(s32) = G_CONSTANT i32 40 136 %2:gprb(p0) = G_PTR_ADD %0, %1(s32) 137 %3:fprb(s32) = G_LOAD %2(p0) :: (load (s32)) 138 $f0 = COPY %3(s32) 139 RetRA implicit $f0 140 141... 142--- 143name: fold_f64_store 144alignment: 4 145legalized: true 146regBankSelected: true 147tracksRegLiveness: true 148body: | 149 bb.1.entry: 150 liveins: $a2, $d6 151 152 ; MIPS32-LABEL: name: fold_f64_store 153 ; MIPS32: liveins: $a2, $d6 154 ; MIPS32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6 155 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a2 156 ; MIPS32: SDC1 [[COPY]], [[COPY1]], -80 :: (store (s64)) 157 ; MIPS32: RetRA 158 %0:fprb(s64) = COPY $d6 159 %1:gprb(p0) = COPY $a2 160 %2:gprb(s32) = G_CONSTANT i32 -80 161 %3:gprb(p0) = G_PTR_ADD %1, %2(s32) 162 G_STORE %0(s64), %3(p0) :: (store (s64)) 163 RetRA 164 165... 166--- 167name: fold_i16_load 168alignment: 4 169legalized: true 170regBankSelected: true 171tracksRegLiveness: true 172body: | 173 bb.1.entry: 174 liveins: $a0 175 176 ; MIPS32-LABEL: name: fold_i16_load 177 ; MIPS32: liveins: $a0 178 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 179 ; MIPS32: [[LHu:%[0-9]+]]:gpr32 = LHu [[COPY]], -20 :: (load (s16)) 180 ; MIPS32: $v0 = COPY [[LHu]] 181 ; MIPS32: RetRA implicit $v0 182 %0:gprb(p0) = COPY $a0 183 %1:gprb(s32) = G_CONSTANT i32 -20 184 %2:gprb(p0) = G_PTR_ADD %0, %1(s32) 185 %4:gprb(s32) = G_LOAD %2(p0) :: (load (s16)) 186 $v0 = COPY %4(s32) 187 RetRA implicit $v0 188 189... 190--- 191name: fold_i32_store 192alignment: 4 193legalized: true 194regBankSelected: true 195tracksRegLiveness: true 196body: | 197 bb.1.entry: 198 liveins: $a0, $a1 199 200 ; MIPS32-LABEL: name: fold_i32_store 201 ; MIPS32: liveins: $a0, $a1 202 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 203 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 204 ; MIPS32: SW [[COPY]], [[COPY1]], 40 :: (store (s32)) 205 ; MIPS32: RetRA 206 %0:gprb(s32) = COPY $a0 207 %1:gprb(p0) = COPY $a1 208 %2:gprb(s32) = G_CONSTANT i32 40 209 %3:gprb(p0) = G_PTR_ADD %1, %2(s32) 210 G_STORE %0(s32), %3(p0) :: (store (s32)) 211 RetRA 212 213... 214 215