1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP32 3# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP64 4--- | 5 6 define void @load_i32(ptr %ptr) {entry: ret void} 7 define void @load_float(ptr %ptr) {entry: ret void} 8 define void @load_double(ptr %ptr) {entry: ret void} 9 10... 11--- 12name: load_i32 13alignment: 4 14legalized: true 15regBankSelected: true 16tracksRegLiveness: true 17body: | 18 bb.1.entry: 19 liveins: $a0 20 21 ; MIPS32FP32-LABEL: name: load_i32 22 ; MIPS32FP32: liveins: $a0 23 ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 24 ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load (s32) from %ir.ptr) 25 ; MIPS32FP32: $v0 = COPY [[LW]] 26 ; MIPS32FP32: RetRA implicit $v0 27 ; MIPS32FP64-LABEL: name: load_i32 28 ; MIPS32FP64: liveins: $a0 29 ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 30 ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load (s32) from %ir.ptr) 31 ; MIPS32FP64: $v0 = COPY [[LW]] 32 ; MIPS32FP64: RetRA implicit $v0 33 %0:gprb(p0) = COPY $a0 34 %1:gprb(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr) 35 $v0 = COPY %1(s32) 36 RetRA implicit $v0 37 38... 39--- 40name: load_float 41alignment: 4 42legalized: true 43regBankSelected: true 44tracksRegLiveness: true 45body: | 46 bb.1.entry: 47 liveins: $a0 48 49 ; MIPS32FP32-LABEL: name: load_float 50 ; MIPS32FP32: liveins: $a0 51 ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 52 ; MIPS32FP32: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[COPY]], 0 :: (load (s32) from %ir.ptr) 53 ; MIPS32FP32: $f0 = COPY [[LWC1_]] 54 ; MIPS32FP32: RetRA implicit $f0 55 ; MIPS32FP64-LABEL: name: load_float 56 ; MIPS32FP64: liveins: $a0 57 ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 58 ; MIPS32FP64: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[COPY]], 0 :: (load (s32) from %ir.ptr) 59 ; MIPS32FP64: $f0 = COPY [[LWC1_]] 60 ; MIPS32FP64: RetRA implicit $f0 61 %0:gprb(p0) = COPY $a0 62 %1:fprb(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr) 63 $f0 = COPY %1(s32) 64 RetRA implicit $f0 65 66... 67--- 68name: load_double 69alignment: 4 70legalized: true 71regBankSelected: true 72tracksRegLiveness: true 73body: | 74 bb.1.entry: 75 liveins: $a0 76 77 ; MIPS32FP32-LABEL: name: load_double 78 ; MIPS32FP32: liveins: $a0 79 ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 80 ; MIPS32FP32: [[LDC1_:%[0-9]+]]:afgr64 = LDC1 [[COPY]], 0 :: (load (s64) from %ir.ptr) 81 ; MIPS32FP32: $d0 = COPY [[LDC1_]] 82 ; MIPS32FP32: RetRA implicit $d0 83 ; MIPS32FP64-LABEL: name: load_double 84 ; MIPS32FP64: liveins: $a0 85 ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 86 ; MIPS32FP64: [[LDC164_:%[0-9]+]]:fgr64 = LDC164 [[COPY]], 0 :: (load (s64) from %ir.ptr) 87 ; MIPS32FP64: $d0 = COPY [[LDC164_]] 88 ; MIPS32FP64: RetRA implicit $d0 89 %0:gprb(p0) = COPY $a0 90 %1:fprb(s64) = G_LOAD %0(p0) :: (load (s64) from %ir.ptr) 91 $d0 = COPY %1(s64) 92 RetRA implicit $d0 93 94... 95