xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/icmp.mir (revision 48904e9452de81375bd55d830d08e51cc8f2ec7e) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @eq_i32() {entry: ret void}
6  define void @ne_i32() {entry: ret void}
7  define void @sgt_i32() {entry: ret void}
8  define void @sge_i32() {entry: ret void}
9  define void @slt_i32() {entry: ret void}
10  define void @sle_i32() {entry: ret void}
11  define void @ugt_i32() {entry: ret void}
12  define void @uge_i32() {entry: ret void}
13  define void @ult_i32() {entry: ret void}
14  define void @ule_i32() {entry: ret void}
15  define void @eq_ptr() {entry: ret void}
16
17
18...
19---
20name:            eq_i32
21alignment:       4
22legalized:       true
23regBankSelected: true
24tracksRegLiveness: true
25body:             |
26  bb.1.entry:
27    liveins: $a0, $a1
28
29    ; MIPS32-LABEL: name: eq_i32
30    ; MIPS32: liveins: $a0, $a1
31    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
32    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
33    ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
34    ; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1
35    ; MIPS32: $v0 = COPY [[SLTiu]]
36    ; MIPS32: RetRA implicit $v0
37    %0:gprb(s32) = COPY $a0
38    %1:gprb(s32) = COPY $a1
39    %4:gprb(s32) = G_ICMP intpred(eq), %0(s32), %1
40    %3:gprb(s32) = COPY %4(s32)
41    $v0 = COPY %3(s32)
42    RetRA implicit $v0
43
44...
45---
46name:            ne_i32
47alignment:       4
48legalized:       true
49regBankSelected: true
50tracksRegLiveness: true
51body:             |
52  bb.1.entry:
53    liveins: $a0, $a1
54
55    ; MIPS32-LABEL: name: ne_i32
56    ; MIPS32: liveins: $a0, $a1
57    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
58    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
59    ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
60    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu $zero, [[XOR]]
61    ; MIPS32: $v0 = COPY [[SLTu]]
62    ; MIPS32: RetRA implicit $v0
63    %0:gprb(s32) = COPY $a0
64    %1:gprb(s32) = COPY $a1
65    %4:gprb(s32) = G_ICMP intpred(ne), %0(s32), %1
66    %3:gprb(s32) = COPY %4(s32)
67    $v0 = COPY %3(s32)
68    RetRA implicit $v0
69
70...
71---
72name:            sgt_i32
73alignment:       4
74legalized:       true
75regBankSelected: true
76tracksRegLiveness: true
77body:             |
78  bb.1.entry:
79    liveins: $a0, $a1
80
81    ; MIPS32-LABEL: name: sgt_i32
82    ; MIPS32: liveins: $a0, $a1
83    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
84    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
85    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]
86    ; MIPS32: $v0 = COPY [[SLT]]
87    ; MIPS32: RetRA implicit $v0
88    %0:gprb(s32) = COPY $a0
89    %1:gprb(s32) = COPY $a1
90    %4:gprb(s32) = G_ICMP intpred(sgt), %0(s32), %1
91    %3:gprb(s32) = COPY %4(s32)
92    $v0 = COPY %3(s32)
93    RetRA implicit $v0
94
95...
96---
97name:            sge_i32
98alignment:       4
99legalized:       true
100regBankSelected: true
101tracksRegLiveness: true
102body:             |
103  bb.1.entry:
104    liveins: $a0, $a1
105
106    ; MIPS32-LABEL: name: sge_i32
107    ; MIPS32: liveins: $a0, $a1
108    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
109    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
110    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]
111    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1
112    ; MIPS32: $v0 = COPY [[XORi]]
113    ; MIPS32: RetRA implicit $v0
114    %0:gprb(s32) = COPY $a0
115    %1:gprb(s32) = COPY $a1
116    %4:gprb(s32) = G_ICMP intpred(sge), %0(s32), %1
117    %3:gprb(s32) = COPY %4(s32)
118    $v0 = COPY %3(s32)
119    RetRA implicit $v0
120
121...
122---
123name:            slt_i32
124alignment:       4
125legalized:       true
126regBankSelected: true
127tracksRegLiveness: true
128body:             |
129  bb.1.entry:
130    liveins: $a0, $a1
131
132    ; MIPS32-LABEL: name: slt_i32
133    ; MIPS32: liveins: $a0, $a1
134    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
135    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
136    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]
137    ; MIPS32: $v0 = COPY [[SLT]]
138    ; MIPS32: RetRA implicit $v0
139    %0:gprb(s32) = COPY $a0
140    %1:gprb(s32) = COPY $a1
141    %4:gprb(s32) = G_ICMP intpred(slt), %0(s32), %1
142    %3:gprb(s32) = COPY %4(s32)
143    $v0 = COPY %3(s32)
144    RetRA implicit $v0
145
146...
147---
148name:            sle_i32
149alignment:       4
150legalized:       true
151regBankSelected: true
152tracksRegLiveness: true
153body:             |
154  bb.1.entry:
155    liveins: $a0, $a1
156
157    ; MIPS32-LABEL: name: sle_i32
158    ; MIPS32: liveins: $a0, $a1
159    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
160    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
161    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]
162    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1
163    ; MIPS32: $v0 = COPY [[XORi]]
164    ; MIPS32: RetRA implicit $v0
165    %0:gprb(s32) = COPY $a0
166    %1:gprb(s32) = COPY $a1
167    %4:gprb(s32) = G_ICMP intpred(sle), %0(s32), %1
168    %3:gprb(s32) = COPY %4(s32)
169    $v0 = COPY %3(s32)
170    RetRA implicit $v0
171
172...
173---
174name:            ugt_i32
175alignment:       4
176legalized:       true
177regBankSelected: true
178tracksRegLiveness: true
179body:             |
180  bb.1.entry:
181    liveins: $a0, $a1
182
183    ; MIPS32-LABEL: name: ugt_i32
184    ; MIPS32: liveins: $a0, $a1
185    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
186    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
187    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]
188    ; MIPS32: $v0 = COPY [[SLTu]]
189    ; MIPS32: RetRA implicit $v0
190    %0:gprb(s32) = COPY $a0
191    %1:gprb(s32) = COPY $a1
192    %4:gprb(s32) = G_ICMP intpred(ugt), %0(s32), %1
193    %3:gprb(s32) = COPY %4(s32)
194    $v0 = COPY %3(s32)
195    RetRA implicit $v0
196
197...
198---
199name:            uge_i32
200alignment:       4
201legalized:       true
202regBankSelected: true
203tracksRegLiveness: true
204body:             |
205  bb.1.entry:
206    liveins: $a0, $a1
207
208    ; MIPS32-LABEL: name: uge_i32
209    ; MIPS32: liveins: $a0, $a1
210    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
211    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
212    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]
213    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1
214    ; MIPS32: $v0 = COPY [[XORi]]
215    ; MIPS32: RetRA implicit $v0
216    %0:gprb(s32) = COPY $a0
217    %1:gprb(s32) = COPY $a1
218    %4:gprb(s32) = G_ICMP intpred(uge), %0(s32), %1
219    %3:gprb(s32) = COPY %4(s32)
220    $v0 = COPY %3(s32)
221    RetRA implicit $v0
222
223...
224---
225name:            ult_i32
226alignment:       4
227legalized:       true
228regBankSelected: true
229tracksRegLiveness: true
230body:             |
231  bb.1.entry:
232    liveins: $a0, $a1
233
234    ; MIPS32-LABEL: name: ult_i32
235    ; MIPS32: liveins: $a0, $a1
236    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
237    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
238    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]
239    ; MIPS32: $v0 = COPY [[SLTu]]
240    ; MIPS32: RetRA implicit $v0
241    %0:gprb(s32) = COPY $a0
242    %1:gprb(s32) = COPY $a1
243    %4:gprb(s32) = G_ICMP intpred(ult), %0(s32), %1
244    %3:gprb(s32) = COPY %4(s32)
245    $v0 = COPY %3(s32)
246    RetRA implicit $v0
247
248...
249---
250name:            ule_i32
251alignment:       4
252legalized:       true
253regBankSelected: true
254tracksRegLiveness: true
255body:             |
256  bb.1.entry:
257    liveins: $a0, $a1
258
259    ; MIPS32-LABEL: name: ule_i32
260    ; MIPS32: liveins: $a0, $a1
261    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
262    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
263    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]
264    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1
265    ; MIPS32: $v0 = COPY [[XORi]]
266    ; MIPS32: RetRA implicit $v0
267    %0:gprb(s32) = COPY $a0
268    %1:gprb(s32) = COPY $a1
269    %4:gprb(s32) = G_ICMP intpred(ule), %0(s32), %1
270    %3:gprb(s32) = COPY %4(s32)
271    $v0 = COPY %3(s32)
272    RetRA implicit $v0
273
274...
275---
276name:            eq_ptr
277alignment:       4
278legalized:       true
279regBankSelected: true
280tracksRegLiveness: true
281body:             |
282  bb.1.entry:
283    liveins: $a0, $a1
284
285    ; MIPS32-LABEL: name: eq_ptr
286    ; MIPS32: liveins: $a0, $a1
287    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
288    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
289    ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
290    ; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1
291    ; MIPS32: $v0 = COPY [[SLTiu]]
292    ; MIPS32: RetRA implicit $v0
293    %0:gprb(p0) = COPY $a0
294    %1:gprb(p0) = COPY $a1
295    %4:gprb(s32) = G_ICMP intpred(eq), %0(p0), %1
296    %3:gprb(s32) = COPY %4(s32)
297    $v0 = COPY %3(s32)
298    RetRA implicit $v0
299
300...
301