xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ctlz.mir (revision 2b66d32f3f4c4ef144e0835029e3ddd071b6ed5a) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3---
4name:            ctlz_i32
5alignment:       4
6legalized:       true
7regBankSelected: true
8tracksRegLiveness: true
9body:             |
10  bb.1.entry:
11    liveins: $a0
12
13    ; MIPS32-LABEL: name: ctlz_i32
14    ; MIPS32: liveins: $a0
15    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
16    ; MIPS32: [[CLZ:%[0-9]+]]:gpr32 = CLZ [[COPY]]
17    ; MIPS32: $v0 = COPY [[CLZ]]
18    ; MIPS32: RetRA implicit $v0
19    %0:gprb(s32) = COPY $a0
20    %1:gprb(s32) = G_CTLZ %0(s32)
21    $v0 = COPY %1(s32)
22    RetRA implicit $v0
23
24...
25