1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3--- | 4 5 define void @and_i32() {entry: ret void} 6 define void @and_imm() {entry: ret void} 7 define void @and_not_imm32ZExt16() {entry: ret void} 8 define void @or_i32() {entry: ret void} 9 define void @or_imm() {entry: ret void} 10 define void @or_not_imm32ZExt16() {entry: ret void} 11 define void @xor_i32() {entry: ret void} 12 define void @xor_imm() {entry: ret void} 13 define void @xor_not_imm32ZExt16() {entry: ret void} 14 define void @shl(i32) {entry: ret void} 15 define void @ashr(i32) {entry: ret void} 16 define void @lshr(i32) {entry: ret void} 17 define void @shlv(i32, i32) {entry: ret void} 18 define void @ashrv(i32, i32) {entry: ret void} 19 define void @lshrv(i32, i32) {entry: ret void} 20 21... 22--- 23name: and_i32 24alignment: 4 25legalized: true 26regBankSelected: true 27tracksRegLiveness: true 28body: | 29 bb.1.entry: 30 liveins: $a0, $a1 31 32 ; MIPS32-LABEL: name: and_i32 33 ; MIPS32: liveins: $a0, $a1 34 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 35 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 36 ; MIPS32: [[AND:%[0-9]+]]:gpr32 = AND [[COPY1]], [[COPY]] 37 ; MIPS32: $v0 = COPY [[AND]] 38 ; MIPS32: RetRA implicit $v0 39 %0:gprb(s32) = COPY $a0 40 %1:gprb(s32) = COPY $a1 41 %2:gprb(s32) = G_AND %1, %0 42 $v0 = COPY %2(s32) 43 RetRA implicit $v0 44 45... 46--- 47name: and_imm 48alignment: 4 49legalized: true 50regBankSelected: true 51tracksRegLiveness: true 52body: | 53 bb.1.entry: 54 liveins: $a0 55 56 ; MIPS32-LABEL: name: and_imm 57 ; MIPS32: liveins: $a0 58 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 59 ; MIPS32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 255 60 ; MIPS32: $v0 = COPY [[ANDi]] 61 ; MIPS32: RetRA implicit $v0 62 %0:gprb(s32) = COPY $a0 63 %1:gprb(s32) = G_CONSTANT i32 255 64 %2:gprb(s32) = G_AND %0, %1 65 $v0 = COPY %2(s32) 66 RetRA implicit $v0 67 68... 69--- 70name: and_not_imm32ZExt16 71alignment: 4 72legalized: true 73regBankSelected: true 74tracksRegLiveness: true 75body: | 76 bb.1.entry: 77 liveins: $a0 78 79 ; MIPS32-LABEL: name: and_not_imm32ZExt16 80 ; MIPS32: liveins: $a0 81 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 82 ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65280 83 ; MIPS32: [[AND:%[0-9]+]]:gpr32 = AND [[COPY]], [[ADDiu]] 84 ; MIPS32: $v0 = COPY [[AND]] 85 ; MIPS32: RetRA implicit $v0 86 %0:gprb(s32) = COPY $a0 87 %1:gprb(s32) = G_CONSTANT i32 -256 88 %2:gprb(s32) = G_AND %0, %1 89 $v0 = COPY %2(s32) 90 RetRA implicit $v0 91 92... 93--- 94name: or_i32 95alignment: 4 96legalized: true 97regBankSelected: true 98tracksRegLiveness: true 99body: | 100 bb.1.entry: 101 liveins: $a0, $a1 102 103 ; MIPS32-LABEL: name: or_i32 104 ; MIPS32: liveins: $a0, $a1 105 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 106 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 107 ; MIPS32: [[OR:%[0-9]+]]:gpr32 = OR [[COPY1]], [[COPY]] 108 ; MIPS32: $v0 = COPY [[OR]] 109 ; MIPS32: RetRA implicit $v0 110 %0:gprb(s32) = COPY $a0 111 %1:gprb(s32) = COPY $a1 112 %2:gprb(s32) = G_OR %1, %0 113 $v0 = COPY %2(s32) 114 RetRA implicit $v0 115 116... 117--- 118name: or_imm 119alignment: 4 120legalized: true 121regBankSelected: true 122tracksRegLiveness: true 123body: | 124 bb.1.entry: 125 liveins: $a0 126 127 ; MIPS32-LABEL: name: or_imm 128 ; MIPS32: liveins: $a0 129 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 130 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[COPY]], 65535 131 ; MIPS32: $v0 = COPY [[ORi]] 132 ; MIPS32: RetRA implicit $v0 133 %0:gprb(s32) = COPY $a0 134 %1:gprb(s32) = G_CONSTANT i32 65535 135 %2:gprb(s32) = G_OR %0, %1 136 $v0 = COPY %2(s32) 137 RetRA implicit $v0 138 139... 140--- 141name: or_not_imm32ZExt16 142alignment: 4 143legalized: true 144regBankSelected: true 145tracksRegLiveness: true 146body: | 147 bb.1.entry: 148 liveins: $a0 149 150 ; MIPS32-LABEL: name: or_not_imm32ZExt16 151 ; MIPS32: liveins: $a0 152 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 153 ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 1 154 ; MIPS32: [[OR:%[0-9]+]]:gpr32 = OR [[COPY]], [[LUi]] 155 ; MIPS32: $v0 = COPY [[OR]] 156 ; MIPS32: RetRA implicit $v0 157 %0:gprb(s32) = COPY $a0 158 %1:gprb(s32) = G_CONSTANT i32 65536 159 %2:gprb(s32) = G_OR %0, %1 160 $v0 = COPY %2(s32) 161 RetRA implicit $v0 162 163... 164--- 165name: xor_i32 166alignment: 4 167legalized: true 168regBankSelected: true 169tracksRegLiveness: true 170body: | 171 bb.1.entry: 172 liveins: $a0, $a1 173 174 ; MIPS32-LABEL: name: xor_i32 175 ; MIPS32: liveins: $a0, $a1 176 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 177 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 178 ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY1]], [[COPY]] 179 ; MIPS32: $v0 = COPY [[XOR]] 180 ; MIPS32: RetRA implicit $v0 181 %0:gprb(s32) = COPY $a0 182 %1:gprb(s32) = COPY $a1 183 %2:gprb(s32) = G_XOR %1, %0 184 $v0 = COPY %2(s32) 185 RetRA implicit $v0 186 187... 188--- 189name: xor_imm 190alignment: 4 191legalized: true 192regBankSelected: true 193tracksRegLiveness: true 194body: | 195 bb.1.entry: 196 liveins: $a0 197 198 ; MIPS32-LABEL: name: xor_imm 199 ; MIPS32: liveins: $a0 200 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 201 ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[COPY]], 1 202 ; MIPS32: $v0 = COPY [[XORi]] 203 ; MIPS32: RetRA implicit $v0 204 %0:gprb(s32) = COPY $a0 205 %1:gprb(s32) = G_CONSTANT i32 1 206 %2:gprb(s32) = G_XOR %0, %1 207 $v0 = COPY %2(s32) 208 RetRA implicit $v0 209 210... 211--- 212name: xor_not_imm32ZExt16 213alignment: 4 214legalized: true 215regBankSelected: true 216tracksRegLiveness: true 217body: | 218 bb.1.entry: 219 liveins: $a0 220 221 ; MIPS32-LABEL: name: xor_not_imm32ZExt16 222 ; MIPS32: liveins: $a0 223 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 224 ; MIPS32: [[NOR:%[0-9]+]]:gpr32 = NOR [[COPY]], $zero 225 ; MIPS32: $v0 = COPY [[NOR]] 226 ; MIPS32: RetRA implicit $v0 227 %0:gprb(s32) = COPY $a0 228 %1:gprb(s32) = G_CONSTANT i32 -1 229 %2:gprb(s32) = G_XOR %0, %1 230 $v0 = COPY %2(s32) 231 RetRA implicit $v0 232 233... 234--- 235name: shl 236alignment: 4 237legalized: true 238regBankSelected: true 239tracksRegLiveness: true 240body: | 241 bb.1.entry: 242 liveins: $a0 243 244 ; MIPS32-LABEL: name: shl 245 ; MIPS32: liveins: $a0 246 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 247 ; MIPS32: [[SLL:%[0-9]+]]:gpr32 = SLL [[COPY]], 1 248 ; MIPS32: $v0 = COPY [[SLL]] 249 ; MIPS32: RetRA implicit $v0 250 %0:gprb(s32) = COPY $a0 251 %1:gprb(s32) = G_CONSTANT i32 1 252 %2:gprb(s32) = G_SHL %0, %1 253 $v0 = COPY %2(s32) 254 RetRA implicit $v0 255 256... 257--- 258name: ashr 259alignment: 4 260legalized: true 261regBankSelected: true 262tracksRegLiveness: true 263body: | 264 bb.1.entry: 265 liveins: $a0 266 267 ; MIPS32-LABEL: name: ashr 268 ; MIPS32: liveins: $a0 269 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 270 ; MIPS32: [[SRA:%[0-9]+]]:gpr32 = SRA [[COPY]], 1 271 ; MIPS32: $v0 = COPY [[SRA]] 272 ; MIPS32: RetRA implicit $v0 273 %0:gprb(s32) = COPY $a0 274 %1:gprb(s32) = G_CONSTANT i32 1 275 %2:gprb(s32) = G_ASHR %0, %1 276 $v0 = COPY %2(s32) 277 RetRA implicit $v0 278 279... 280--- 281name: lshr 282alignment: 4 283legalized: true 284regBankSelected: true 285tracksRegLiveness: true 286body: | 287 bb.1.entry: 288 liveins: $a0 289 290 ; MIPS32-LABEL: name: lshr 291 ; MIPS32: liveins: $a0 292 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 293 ; MIPS32: [[SRL:%[0-9]+]]:gpr32 = SRL [[COPY]], 1 294 ; MIPS32: $v0 = COPY [[SRL]] 295 ; MIPS32: RetRA implicit $v0 296 %0:gprb(s32) = COPY $a0 297 %1:gprb(s32) = G_CONSTANT i32 1 298 %2:gprb(s32) = G_LSHR %0, %1 299 $v0 = COPY %2(s32) 300 RetRA implicit $v0 301 302... 303--- 304name: shlv 305alignment: 4 306legalized: true 307regBankSelected: true 308tracksRegLiveness: true 309body: | 310 bb.1.entry: 311 liveins: $a0, $a1 312 313 ; MIPS32-LABEL: name: shlv 314 ; MIPS32: liveins: $a0, $a1 315 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 316 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 317 ; MIPS32: [[SLLV:%[0-9]+]]:gpr32 = SLLV [[COPY]], [[COPY1]] 318 ; MIPS32: $v0 = COPY [[SLLV]] 319 ; MIPS32: RetRA implicit $v0 320 %0:gprb(s32) = COPY $a0 321 %1:gprb(s32) = COPY $a1 322 %2:gprb(s32) = G_SHL %0, %1 323 $v0 = COPY %2(s32) 324 RetRA implicit $v0 325 326... 327--- 328name: ashrv 329alignment: 4 330legalized: true 331regBankSelected: true 332tracksRegLiveness: true 333body: | 334 bb.1.entry: 335 liveins: $a0, $a1 336 337 ; MIPS32-LABEL: name: ashrv 338 ; MIPS32: liveins: $a0, $a1 339 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 340 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]] 342 ; MIPS32: $v0 = COPY [[SRAV]] 343 ; MIPS32: RetRA implicit $v0 344 %0:gprb(s32) = COPY $a0 345 %1:gprb(s32) = COPY $a1 346 %2:gprb(s32) = G_ASHR %0, %1 347 $v0 = COPY %2(s32) 348 RetRA implicit $v0 349 350... 351--- 352name: lshrv 353alignment: 4 354legalized: true 355regBankSelected: true 356tracksRegLiveness: true 357body: | 358 bb.1.entry: 359 liveins: $a0, $a1 360 361 ; MIPS32-LABEL: name: lshrv 362 ; MIPS32: liveins: $a0, $a1 363 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 364 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 365 ; MIPS32: [[SRLV:%[0-9]+]]:gpr32 = SRLV [[COPY]], [[COPY1]] 366 ; MIPS32: $v0 = COPY [[SRLV]] 367 ; MIPS32: RetRA implicit $v0 368 %0:gprb(s32) = COPY $a0 369 %1:gprb(s32) = COPY $a1 370 %2:gprb(s32) = G_LSHR %0, %1 371 $v0 = COPY %2(s32) 372 RetRA implicit $v0 373 374... 375