xref: /llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add.mir (revision dda8e9554071164c85ac7b8b14bc5349703deaab) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @add_i32() {entry: ret void}
6  define void @add_imm() {entry: ret void}
7  define void @add_negative_imm() {entry: ret void}
8  define void @add_not_imm32SExt16() {entry: ret void}
9
10...
11---
12name:            add_i32
13alignment:       4
14legalized:       true
15regBankSelected: true
16tracksRegLiveness: true
17body:             |
18  bb.0.entry:
19    liveins: $a0, $a1
20
21    ; MIPS32-LABEL: name: add_i32
22    ; MIPS32: liveins: $a0, $a1
23    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
24    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
25    ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[COPY1]]
26    ; MIPS32: $v0 = COPY [[ADDu]]
27    ; MIPS32: RetRA implicit $v0
28    %0:gprb(s32) = COPY $a0
29    %1:gprb(s32) = COPY $a1
30    %2:gprb(s32) = G_ADD %0, %1
31    $v0 = COPY %2(s32)
32    RetRA implicit $v0
33
34...
35---
36name:            add_imm
37alignment:       4
38legalized:       true
39regBankSelected: true
40tracksRegLiveness: true
41body:             |
42  bb.1.entry:
43    liveins: $a0
44
45    ; MIPS32-LABEL: name: add_imm
46    ; MIPS32: liveins: $a0
47    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
48    ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[COPY]], 3
49    ; MIPS32: $v0 = COPY [[ADDiu]]
50    ; MIPS32: RetRA implicit $v0
51    %0:gprb(s32) = COPY $a0
52    %1:gprb(s32) = G_CONSTANT i32 3
53    %2:gprb(s32) = G_ADD %0, %1
54    $v0 = COPY %2(s32)
55    RetRA implicit $v0
56
57...
58---
59name:            add_negative_imm
60alignment:       4
61legalized:       true
62regBankSelected: true
63tracksRegLiveness: true
64body:             |
65  bb.1.entry:
66    liveins: $a0
67
68    ; MIPS32-LABEL: name: add_negative_imm
69    ; MIPS32: liveins: $a0
70    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
71    ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[COPY]], -3
72    ; MIPS32: $v0 = COPY [[ADDiu]]
73    ; MIPS32: RetRA implicit $v0
74    %0:gprb(s32) = COPY $a0
75    %1:gprb(s32) = G_CONSTANT i32 -3
76    %2:gprb(s32) = G_ADD %0, %1
77    $v0 = COPY %2(s32)
78    RetRA implicit $v0
79
80...
81---
82name:            add_not_imm32SExt16
83alignment:       4
84legalized:       true
85regBankSelected: true
86tracksRegLiveness: true
87body:             |
88  bb.1.entry:
89    liveins: $a0
90
91    ; MIPS32-LABEL: name: add_not_imm32SExt16
92    ; MIPS32: liveins: $a0
93    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
94    ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 65535
95    ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[ORi]]
96    ; MIPS32: $v0 = COPY [[ADDu]]
97    ; MIPS32: RetRA implicit $v0
98    %0:gprb(s32) = COPY $a0
99    %1:gprb(s32) = G_CONSTANT i32 65535
100    %2:gprb(s32) = G_ADD %0, %1
101    $v0 = COPY %2(s32)
102    RetRA implicit $v0
103
104...
105