xref: /llvm-project/llvm/test/CodeGen/MIR/X86/null-register-operands.mir (revision 40a4cbb0f200e5e0bafbd58d55c2da6daab9515d)
1# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
2# This test ensures that the MIR parser parses null register operands correctly.
3
4--- |
5
6  define i32 @deref(ptr %p) {
7  entry:
8    %a = load i32, ptr %p
9    ret i32 %a
10  }
11
12...
13---
14# CHECK: name: deref
15name:            deref
16body: |
17  bb.0.entry:
18    ; CHECK:      $eax = MOV32rm $rdi, 1, $noreg, 0, $noreg
19    ; CHECK-NEXT: RET64 $eax
20    $eax = MOV32rm $rdi, 1, _, 0, $noreg
21    RET64 $eax
22...
23