xref: /llvm-project/llvm/test/CodeGen/MIR/X86/machine-metadata.mir (revision ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=none -o - %s | FileCheck %s
3--- |
4  ; ModuleID = 'test/CodeGen/X86/memcpy-scoped-aa.ll'
5  source_filename = "test/CodeGen/X86/memcpy-scoped-aa.ll"
6  target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
7  target triple = "x86_64-unknown-linux-gnu"
8
9  define i32 @test_memcpy(ptr nocapture %p, ptr nocapture readonly %q) {
10    %p0 = bitcast ptr %p to ptr
11    %add.ptr = getelementptr inbounds i32, ptr %p, i64 4
12    %p1 = bitcast ptr %add.ptr to ptr
13    tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
14    %v0 = load i32, ptr %q, align 4, !alias.scope !3, !noalias !0
15    %q1 = getelementptr inbounds i32, ptr %q, i64 1
16    %v1 = load i32, ptr %q1, align 4, !alias.scope !3, !noalias !0
17    %add = add i32 %v0, %v1
18    ret i32 %add
19  }
20
21  define i32 @test_memcpy_inline(ptr nocapture %p, ptr nocapture readonly %q) {
22    %p0 = bitcast ptr %p to ptr
23    %add.ptr = getelementptr inbounds i32, ptr %p, i64 4
24    %p1 = bitcast ptr %add.ptr to ptr
25    tail call void @llvm.memcpy.inline.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
26    %v0 = load i32, ptr %q, align 4, !alias.scope !3, !noalias !0
27    %q1 = getelementptr inbounds i32, ptr %q, i64 1
28    %v1 = load i32, ptr %q1, align 4, !alias.scope !3, !noalias !0
29    %add = add i32 %v0, %v1
30    ret i32 %add
31  }
32
33  define i32 @test_mempcpy(ptr nocapture %p, ptr nocapture readonly %q) {
34    %p0 = bitcast ptr %p to ptr
35    %add.ptr = getelementptr inbounds i32, ptr %p, i64 4
36    %p1 = bitcast ptr %add.ptr to ptr
37    %call = tail call ptr @mempcpy(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16), !alias.scope !0, !noalias !3
38    %v0 = load i32, ptr %q, align 4, !alias.scope !3, !noalias !0
39    %q1 = getelementptr inbounds i32, ptr %q, i64 1
40    %v1 = load i32, ptr %q1, align 4, !alias.scope !3, !noalias !0
41    %add = add i32 %v0, %v1
42    ret i32 %add
43  }
44
45  ; Function Attrs: argmemonly nofree nounwind willreturn
46  declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0
47
48  ; Function Attrs: argmemonly nofree nounwind willreturn
49  declare void @llvm.memcpy.inline.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64 immarg, i1 immarg) #0
50
51  declare ptr @mempcpy(ptr, ptr, i64)
52
53  attributes #0 = { argmemonly nofree nounwind willreturn }
54
55  !0 = !{!1}
56  !1 = distinct !{!1, !2, !"bax: %p"}
57  !2 = distinct !{!2, !"bax"}
58  !3 = !{!4}
59  !4 = distinct !{!4, !2, !"bax: %q"}
60
61...
62---
63name:            test_memcpy
64machineMetadataNodes:
65  - '!7 = distinct !{!7, !"MemcpyLoweringDomain"}'
66  - '!9 = distinct !{!9, !7, !"Dst"}'
67  - '!8 = !{!4, !9}'
68  - '!5 = !{!1, !6}'
69  - '!6 = distinct !{!6, !7, !"Src"}'
70  - '!11 = !{!4, !6}'
71  - '!10 = !{!1, !9}'
72body:             |
73  bb.0 (%ir-block.0):
74    liveins: $rdi, $rsi
75
76    ; CHECK-LABEL: name: test_memcpy
77    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
78    ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
79    ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !5, !noalias !8)
80    ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !5, !noalias !8)
81    ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !10, !noalias !11)
82    ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !10, !noalias !11)
83    ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
84    ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
85    ; CHECK: $eax = COPY [[ADD32rm]]
86    ; CHECK: RET 0, $eax
87    %1:gr64 = COPY $rsi
88    %0:gr64 = COPY $rdi
89    %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !5, !noalias !8)
90    %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !5, !noalias !8)
91    MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !10, !noalias !11)
92    MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope !10, !noalias !11)
93    %4:gr32 = MOV32rm %1, 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
94    %5:gr32 = ADD32rm %4, %1, 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
95    $eax = COPY %5
96    RET 0, $eax
97
98...
99---
100name:            test_memcpy_inline
101machineMetadataNodes:
102  - '!8 = !{!4, !9}'
103  - '!9 = distinct !{!9, !7, !"Dst"}'
104  - '!5 = !{!1, !6}'
105  - '!7 = distinct !{!7, !"MemcpyLoweringDomain"}'
106  - '!11 = !{!4, !6}'
107  - '!10 = !{!1, !9}'
108  - '!6 = distinct !{!6, !7, !"Src"}'
109body:             |
110  bb.0 (%ir-block.0):
111    liveins: $rdi, $rsi
112
113    ; CHECK-LABEL: name: test_memcpy_inline
114    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
115    ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
116    ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !5, !noalias !8)
117    ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !5, !noalias !8)
118    ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !10, !noalias !11)
119    ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !10, !noalias !11)
120    ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
121    ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
122    ; CHECK: $eax = COPY [[ADD32rm]]
123    ; CHECK: RET 0, $eax
124    %1:gr64 = COPY $rsi
125    %0:gr64 = COPY $rdi
126    %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !5, !noalias !8)
127    %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !5, !noalias !8)
128    MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !10, !noalias !11)
129    MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope !10, !noalias !11)
130    %4:gr32 = MOV32rm %1, 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
131    %5:gr32 = ADD32rm %4, %1, 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
132    $eax = COPY %5
133    RET 0, $eax
134
135...
136---
137name:            test_mempcpy
138machineMetadataNodes:
139  - '!5 = !{!1, !6}'
140  - '!8 = !{!4, !9}'
141  - '!11 = !{!4, !6}'
142  - '!10 = !{!1, !9}'
143  - '!7 = distinct !{!7, !"MemcpyLoweringDomain"}'
144  - '!6 = distinct !{!6, !7, !"Src"}'
145  - '!9 = distinct !{!9, !7, !"Dst"}'
146body:             |
147  bb.0 (%ir-block.0):
148    liveins: $rdi, $rsi
149
150    ; CHECK-LABEL: name: test_mempcpy
151    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
152    ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
153    ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope !5, !noalias !8)
154    ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope !5, !noalias !8)
155    ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope !10, !noalias !11)
156    ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 1, !alias.scope !10, !noalias !11)
157    ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
158    ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
159    ; CHECK: $eax = COPY [[ADD32rm]]
160    ; CHECK: RET 0, $eax
161    %1:gr64 = COPY $rsi
162    %0:gr64 = COPY $rdi
163    %2:gr64 = MOV64rm %0, 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope !5, !noalias !8)
164    %3:gr64 = MOV64rm %0, 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope !5, !noalias !8)
165    MOV64mr %0, 1, $noreg, 8, $noreg, killed %3 :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope !10, !noalias !11)
166    MOV64mr %0, 1, $noreg, 0, $noreg, killed %2 :: (store (s64) into %ir.p0, align 1, !alias.scope !10, !noalias !11)
167    %4:gr32 = MOV32rm %1, 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
168    %5:gr32 = ADD32rm %4, %1, 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
169    $eax = COPY %5
170    RET 0, $eax
171
172...
173