xref: /llvm-project/llvm/test/CodeGen/MIR/X86/expected-named-register-livein.mir (revision 40a4cbb0f200e5e0bafbd58d55c2da6daab9515d) 
1# RUN: not llc -mtriple=x86_64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
2
3--- |
4
5  define i32 @test(i32 %a) {
6  body:
7    ret i32 %a
8  }
9
10...
11---
12name:            test
13body: |
14  bb.0.body:
15    ; CHECK: [[@LINE+1]]:14: expected a named register
16    liveins: %0
17
18    $eax = COPY $edi
19    RET64 $eax
20...
21