xref: /llvm-project/llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1# REQUIRES: asserts
2# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
3
4# CHECK: MachineFunctionProperties required by InstructionSelect pass are not met by function subreg_def_is_not_ssa.
5# CHECK-NEXT: Required properties: IsSSA
6# CHECK-NEXT: Current properties: NoPHIs
7# CHECK-NEXT: MachineFunctionProperties check failed
8
9---
10name: subreg_def_is_not_ssa
11body: |
12  bb.0:
13    %0.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
14
15...
16