1# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass mir-canonicalizer -verify-machineinstrs -o - %s | FileCheck %s 2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass mir-canonicalizer -mir-vreg-namer-use-stable-hash -verify-machineinstrs -o - %s | FileCheck %s 3--- | 4 target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" 5 6 define amdgpu_kernel void @f(ptr addrspace(1) nocapture %arg) { 7 unreachable 8 } 9... 10--- 11name: f 12alignment: 1 13registers: 14 - { id: 0, class: sgpr_64 } 15 - { id: 1, class: sreg_64_xexec } 16 - { id: 2, class: sreg_64_xexec } 17 - { id: 3, class: sreg_64_xexec } 18 - { id: 4, class: sreg_64_xexec } 19 - { id: 5, class: sreg_64_xexec } 20 - { id: 6, class: sreg_64_xexec } 21liveins: 22 - { reg: '$sgpr4_sgpr5', virtual-reg: '%4' } 23body: | 24 bb.0: 25 liveins: $sgpr4_sgpr5 26 27 ; CHECK: COPY 28 ; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM 29 ; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM 30 ; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM 31 ; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM 32 ; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM 33 ; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM 34 35 %0 = COPY $sgpr4_sgpr5 36 %1 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`) 37 %2 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( dereferenceable invariant load (s64) from `ptr addrspace(4) undef`) 38 %3 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( invariant load (s64) from `ptr addrspace(4) undef`) 39 %4 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `ptr addrspace(4) undef`) 40 %5 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `ptr addrspace(2) undef`) 41 %6 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `ptr addrspace(1) undef`) 42 43... 44