xref: /llvm-project/llvm/test/CodeGen/M68k/Data/load-imm.ll (revision d3c10b51a99d4476261f57ceaa7db60960cd5493) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s
3
4define i1 @return_true() {
5; CHECK-LABEL: return_true:
6; CHECK:         .cfi_startproc
7; CHECK-NEXT:  ; %bb.0:
8; CHECK-NEXT:    moveq #1, %d0
9; CHECK-NEXT:    rts
10  ret i1 true
11}
12
13define i8 @return_0_i8() {
14; CHECK-LABEL: return_0_i8:
15; CHECK:         .cfi_startproc
16; CHECK-NEXT:  ; %bb.0:
17; CHECK-NEXT:    moveq #0, %d0
18; CHECK-NEXT:    rts
19  ret i8 0
20}
21
22define i16 @return_0_i16() {
23; CHECK-LABEL: return_0_i16:
24; CHECK:         .cfi_startproc
25; CHECK-NEXT:  ; %bb.0:
26; CHECK-NEXT:    moveq #0, %d0
27; CHECK-NEXT:    rts
28  ret i16 0
29}
30
31define i32 @return_0_i32() {
32; CHECK-LABEL: return_0_i32:
33; CHECK:         .cfi_startproc
34; CHECK-NEXT:  ; %bb.0:
35; CHECK-NEXT:    moveq #0, %d0
36; CHECK-NEXT:    rts
37  ret i32 0
38}
39
40define i64 @return_0_i64() {
41; CHECK-LABEL: return_0_i64:
42; CHECK:         .cfi_startproc
43; CHECK-NEXT:  ; %bb.0:
44; CHECK-NEXT:    moveq #0, %d0
45; CHECK-NEXT:    move.l %d0, %d1
46; CHECK-NEXT:    rts
47  ret i64 0
48}
49
50define i16 @return_neg1_i16() {
51; CHECK-LABEL: return_neg1_i16:
52; CHECK:         .cfi_startproc
53; CHECK-NEXT:  ; %bb.0:
54; CHECK-NEXT:    moveq #-1, %d0
55; CHECK-NEXT:    rts
56  ret i16 -1
57}
58
59define i32 @return_neg1_i32() {
60; CHECK-LABEL: return_neg1_i32:
61; CHECK:         .cfi_startproc
62; CHECK-NEXT:  ; %bb.0:
63; CHECK-NEXT:    moveq #-1, %d0
64; CHECK-NEXT:    rts
65  ret i32 -1
66}
67
68define i8 @return_160_i8() {
69; CHECK-LABEL: return_160_i8:
70; CHECK:         .cfi_startproc
71; CHECK-NEXT:  ; %bb.0:
72; CHECK-NEXT:    moveq #-96, %d0
73; CHECK-NEXT:    rts
74  ret i8 160
75}
76
77define i16 @return_160_i16() {
78; CHECK-LABEL: return_160_i16:
79; CHECK:         .cfi_startproc
80; CHECK-NEXT:  ; %bb.0:
81; CHECK-NEXT:    move.w #160, %d0
82; CHECK-NEXT:    rts
83  ret i16 160
84}
85
86define i32 @return_160_i32() {
87; CHECK-LABEL: return_160_i32:
88; CHECK:         .cfi_startproc
89; CHECK-NEXT:  ; %bb.0:
90; CHECK-NEXT:    moveq #95, %d0
91; CHECK-NEXT:    not.b %d0
92; CHECK-NEXT:    rts
93  ret i32 160
94}
95
96define i16 @return_14281_i16() {
97; CHECK-LABEL: return_14281_i16:
98; CHECK:         .cfi_startproc
99; CHECK-NEXT:  ; %bb.0:
100; CHECK-NEXT:    move.w #14281, %d0
101; CHECK-NEXT:    rts
102  ret i16 14281
103}
104
105define i32 @return_14281_i32() {
106; CHECK-LABEL: return_14281_i32:
107; CHECK:         .cfi_startproc
108; CHECK-NEXT:  ; %bb.0:
109; CHECK-NEXT:    move.l #14281, %d0
110; CHECK-NEXT:    rts
111  ret i32 14281
112}
113
114define i64 @return_14281_i64() {
115; CHECK-LABEL: return_14281_i64:
116; CHECK:         .cfi_startproc
117; CHECK-NEXT:  ; %bb.0:
118; CHECK-NEXT:    moveq #0, %d0
119; CHECK-NEXT:    move.l #14281, %d1
120; CHECK-NEXT:    rts
121  ret i64 14281
122}
123
124define ptr @return_null() {
125; CHECK-LABEL: return_null:
126; CHECK:         .cfi_startproc
127; CHECK-NEXT:  ; %bb.0:
128; CHECK-NEXT:    suba.l %a0, %a0
129; CHECK-NEXT:    rts
130  ret ptr null
131}
132
133define ptr @return_nonnull() {
134; CHECK-LABEL: return_nonnull:
135; CHECK:         .cfi_startproc
136; CHECK-NEXT:  ; %bb.0:
137; CHECK-NEXT:    move.w #200, %a0
138; CHECK-NEXT:    rts
139  ret ptr inttoptr (i32 200 to ptr)
140}
141
142define ptr @return_large_nonnull() {
143; CHECK-LABEL: return_large_nonnull:
144; CHECK:         .cfi_startproc
145; CHECK-NEXT:  ; %bb.0:
146; CHECK-NEXT:    move.l #74281, %a0
147; CHECK-NEXT:    rts
148  ret ptr inttoptr (i32 74281 to ptr)
149}