xref: /llvm-project/llvm/test/CodeGen/M68k/Control/setcc.ll (revision c4c9d4f306732c854fa88d2f30c1a22bb025d0c9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s
3
4;; TODO All these can be improved
5
6define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
7; CHECK-LABEL: t1:
8; CHECK:       ; %bb.0: ; %entry
9; CHECK-NEXT:    move.w (6,%sp), %d0
10; CHECK-NEXT:    and.l #65535, %d0
11; CHECK-NEXT:    sub.l #26, %d0
12; CHECK-NEXT:    shi %d0
13; CHECK-NEXT:    and.l #255, %d0
14; CHECK-NEXT:    lsl.l #5, %d0
15; CHECK-NEXT:    rts
16entry:
17  %0 = icmp ugt i16 %x, 26                        ; <i1> [#uses=1]
18  %iftmp.1.0 = select i1 %0, i16 32, i16 0        ; <i16> [#uses=1]
19  ret i16 %iftmp.1.0
20}
21
22define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
23; CHECK-LABEL: t2:
24; CHECK:       ; %bb.0: ; %entry
25; CHECK-NEXT:    move.w (6,%sp), %d0
26; CHECK-NEXT:    and.l #65535, %d0
27; CHECK-NEXT:    sub.l #26, %d0
28; CHECK-NEXT:    scs %d0
29; CHECK-NEXT:    and.l #255, %d0
30; CHECK-NEXT:    lsl.l #5, %d0
31; CHECK-NEXT:    rts
32entry:
33  %0 = icmp ult i16 %x, 26                        ; <i1> [#uses=1]
34  %iftmp.0.0 = select i1 %0, i16 32, i16 0        ; <i16> [#uses=1]
35  ret i16 %iftmp.0.0
36}
37
38define fastcc i64 @t3(i64 %x) nounwind readnone ssp {
39; CHECK-LABEL: t3:
40; CHECK:       ; %bb.0: ; %entry
41; CHECK-NEXT:    suba.l #4, %sp
42; CHECK-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
43; CHECK-NEXT:    moveq #0, %d2
44; CHECK-NEXT:    sub.l #18, %d1
45; CHECK-NEXT:    subx.l %d2, %d0
46; CHECK-NEXT:    scs %d0
47; CHECK-NEXT:    move.l %d0, %d1
48; CHECK-NEXT:    and.l #255, %d1
49; CHECK-NEXT:    lsl.l #6, %d1
50; CHECK-NEXT:    move.l %d2, %d0
51; CHECK-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
52; CHECK-NEXT:    adda.l #4, %sp
53; CHECK-NEXT:    rts
54entry:
55  %0 = icmp ult i64 %x, 18                        ; <i1> [#uses=1]
56  %iftmp.2.0 = select i1 %0, i64 64, i64 0        ; <i64> [#uses=1]
57  ret i64 %iftmp.2.0
58}
59
60define i8 @t5(i32 %a) {
61; CHECK-LABEL: t5:
62; CHECK:         .cfi_startproc
63; CHECK-NEXT:  ; %bb.0: ; %entry
64; CHECK-NEXT:    moveq #31, %d1
65; CHECK-NEXT:    move.l (4,%sp), %d0
66; CHECK-NEXT:    lsr.l %d1, %d0
67; CHECK-NEXT:    eori.b #1, %d0
68; CHECK-NEXT:    ; kill: def $bd0 killed $bd0 killed $d0
69; CHECK-NEXT:    rts
70entry:
71  %.lobit = lshr i32 %a, 31
72  %trunc = trunc i32 %.lobit to i8
73  %.not = xor i8 %trunc, 1
74  ret i8 %.not
75}
76
77
78;
79; TODO: Should it be like this?
80; cmp.l
81; smi
82; since we are intereseted in sign bit only
83; and.l in the end is superfluous
84
85define zeroext i1 @t6(i32 %a) {
86; CHECK-LABEL: t6:
87; CHECK:         .cfi_startproc
88; CHECK-NEXT:  ; %bb.0: ; %entry
89; CHECK-NEXT:    moveq #31, %d0
90; CHECK-NEXT:    move.l (4,%sp), %d1
91; CHECK-NEXT:    lsr.l %d0, %d1
92; CHECK-NEXT:    eori.b #1, %d1
93; CHECK-NEXT:    move.l %d1, %d0
94; CHECK-NEXT:    and.l #255, %d0
95; CHECK-NEXT:    rts
96entry:
97  %.lobit = lshr i32 %a, 31
98  %trunc = trunc i32 %.lobit to i1
99  %.not = xor i1 %trunc, 1
100  ret i1 %.not
101}
102