xref: /llvm-project/llvm/test/CodeGen/M68k/Arith/add.ll (revision d3c10b51a99d4476261f57ceaa7db60960cd5493)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s
3
4define i64 @test1(i64 %A, i32 %B) nounwind {
5; CHECK-LABEL: test1:
6; CHECK:       ; %bb.0:
7; CHECK-NEXT:    move.l (12,%sp), %d0
8; CHECK-NEXT:    add.l (4,%sp), %d0
9; CHECK-NEXT:    move.l (8,%sp), %d1
10; CHECK-NEXT:    rts
11  %tmp12 = zext i32 %B to i64
12  %tmp3 = shl i64 %tmp12, 32
13  %tmp5 = add i64 %tmp3, %A
14  ret i64 %tmp5
15}
16
17define void @test2(ptr inreg %a) nounwind {
18; CHECK-LABEL: test2:
19; CHECK:       ; %bb.0:
20; CHECK-NEXT:    move.l %d0, %a0
21; CHECK-NEXT:    add.l #128, (%a0)
22; CHECK-NEXT:    rts
23  %aa = load i32, ptr %a
24  %b = add i32 %aa, 128
25  store i32 %b, ptr %a
26  ret void
27}
28
29define fastcc void @test2_fast(ptr inreg %a) nounwind {
30; CHECK-LABEL: test2_fast:
31; CHECK:       ; %bb.0:
32; CHECK-NEXT:    add.l #128, (%a0)
33; CHECK-NEXT:    rts
34  %aa = load i32, ptr %a
35  %b = add i32 %aa, 128
36  store i32 %b, ptr %a
37  ret void
38}
39
40define fastcc void @test3(ptr inreg %a) nounwind {
41; CHECK-LABEL: test3:
42; CHECK:       ; %bb.0:
43; CHECK-NEXT:    suba.l #4, %sp
44; CHECK-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
45; CHECK-NEXT:    move.l (%a0), %d0
46; CHECK-NEXT:    moveq #0, %d1
47; CHECK-NEXT:    move.l #-2147483648, %d2
48; CHECK-NEXT:    add.l (4,%a0), %d2
49; CHECK-NEXT:    addx.l %d0, %d1
50; CHECK-NEXT:    move.l %d2, (4,%a0)
51; CHECK-NEXT:    move.l %d1, (%a0)
52; CHECK-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
53; CHECK-NEXT:    adda.l #4, %sp
54; CHECK-NEXT:    rts
55  %aa = load i64, ptr %a
56  %b = add i64 %aa, 2147483648
57  store i64 %b, ptr %a
58  ret void
59}
60
61define fastcc void @test4(ptr inreg %a) nounwind {
62; CHECK-LABEL: test4:
63; CHECK:       ; %bb.0:
64; CHECK-NEXT:    suba.l #4, %sp
65; CHECK-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
66; CHECK-NEXT:    move.l (%a0), %d0
67; CHECK-NEXT:    moveq #0, %d1
68; CHECK-NEXT:    moveq #127, %d2
69; CHECK-NEXT:    not.b %d2
70; CHECK-NEXT:    add.l (4,%a0), %d2
71; CHECK-NEXT:    addx.l %d0, %d1
72; CHECK-NEXT:    move.l %d2, (4,%a0)
73; CHECK-NEXT:    move.l %d1, (%a0)
74; CHECK-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
75; CHECK-NEXT:    adda.l #4, %sp
76; CHECK-NEXT:    rts
77  %aa = load i64, ptr %a
78  %b = add i64 %aa, 128
79  store i64 %b, ptr %a
80  ret void
81}
82
83define fastcc i32 @test9(i32 %x, i32 %y) nounwind readnone {
84; CHECK-LABEL: test9:
85; CHECK:       ; %bb.0:
86; CHECK-NEXT:    sub.l #10, %d0
87; CHECK-NEXT:    seq %d0
88; CHECK-NEXT:    and.l #255, %d0
89; CHECK-NEXT:    sub.l %d0, %d1
90; CHECK-NEXT:    move.l %d1, %d0
91; CHECK-NEXT:    rts
92  %cmp = icmp eq i32 %x, 10
93  %sub = sext i1 %cmp to i32
94  %cond = add i32 %sub, %y
95  ret i32 %cond
96}
97