xref: /llvm-project/llvm/test/CodeGen/LoongArch/target-abi-from-triple.ll (revision 1897bf61f0bc85c8637997d0f2aa7d94d375d787)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2
3;; Check that the correct ABI is chosen based on the triple given.
4;; TODO: enable the S and F ABIs once support is wired up.
5; RUN: llc --mtriple=loongarch32-linux-gnuf64 --mattr=+d < %s \
6; RUN:   | FileCheck %s --check-prefix=ILP32D
7; RUN: llc --mtriple=loongarch64-linux-gnuf64 --mattr=+d < %s \
8; RUN:   | FileCheck %s --check-prefix=LP64D
9
10define float @f(float %a) {
11; ILP32D-LABEL: f:
12; ILP32D:       # %bb.0:
13; ILP32D-NEXT:    addi.w $a0, $zero, 1
14; ILP32D-NEXT:    movgr2fr.w $fa1, $a0
15; ILP32D-NEXT:    ffint.s.w $fa1, $fa1
16; ILP32D-NEXT:    fadd.s $fa0, $fa0, $fa1
17; ILP32D-NEXT:    ret
18;
19; LP64D-LABEL: f:
20; LP64D:       # %bb.0:
21; LP64D-NEXT:    vldi $vr1, -1168
22; LP64D-NEXT:    fadd.s $fa0, $fa0, $fa1
23; LP64D-NEXT:    ret
24  %1 = fadd float %a, 1.0
25  ret float %1
26}
27
28define double @g(double %a) {
29; ILP32D-LABEL: g:
30; ILP32D:       # %bb.0:
31; ILP32D-NEXT:    addi.w $a0, $zero, 1
32; ILP32D-NEXT:    movgr2fr.w $fa1, $a0
33; ILP32D-NEXT:    ffint.s.w $fa1, $fa1
34; ILP32D-NEXT:    fcvt.d.s $fa1, $fa1
35; ILP32D-NEXT:    fadd.d $fa0, $fa0, $fa1
36; ILP32D-NEXT:    ret
37;
38; LP64D-LABEL: g:
39; LP64D:       # %bb.0:
40; LP64D-NEXT:    vldi $vr1, -912
41; LP64D-NEXT:    fadd.d $fa0, $fa0, $fa1
42; LP64D-NEXT:    ret
43  %1 = fadd double %a, 1.0
44  ret double %1
45}
46