xref: /llvm-project/llvm/test/CodeGen/LoongArch/select-const.ll (revision 9d4f7f44b64d87d1068859906f43b7ce03a7388b) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
4
5define signext i32 @select_const_int_one_away(i1 zeroext %a) nounwind {
6; LA32-LABEL: select_const_int_one_away:
7; LA32:       # %bb.0:
8; LA32-NEXT:    ori $a1, $zero, 4
9; LA32-NEXT:    sub.w $a0, $a1, $a0
10; LA32-NEXT:    ret
11;
12; LA64-LABEL: select_const_int_one_away:
13; LA64:       # %bb.0:
14; LA64-NEXT:    ori $a1, $zero, 4
15; LA64-NEXT:    sub.d $a0, $a1, $a0
16; LA64-NEXT:    ret
17  %1 = select i1 %a, i32 3, i32 4
18  ret i32 %1
19}
20
21define signext i32 @select_const_int_pow2_zero(i1 zeroext %a) nounwind {
22; LA32-LABEL: select_const_int_pow2_zero:
23; LA32:       # %bb.0:
24; LA32-NEXT:    slli.w $a0, $a0, 2
25; LA32-NEXT:    ret
26;
27; LA64-LABEL: select_const_int_pow2_zero:
28; LA64:       # %bb.0:
29; LA64-NEXT:    slli.d $a0, $a0, 2
30; LA64-NEXT:    ret
31  %1 = select i1 %a, i32 4, i32 0
32  ret i32 %1
33}
34
35define signext i32 @select_eq_zero_negone(i32 signext %a, i32 signext %b) nounwind {
36; LA32-LABEL: select_eq_zero_negone:
37; LA32:       # %bb.0:
38; LA32-NEXT:    xor $a0, $a0, $a1
39; LA32-NEXT:    sltui $a0, $a0, 1
40; LA32-NEXT:    sub.w $a0, $zero, $a0
41; LA32-NEXT:    ret
42;
43; LA64-LABEL: select_eq_zero_negone:
44; LA64:       # %bb.0:
45; LA64-NEXT:    xor $a0, $a0, $a1
46; LA64-NEXT:    sltui $a0, $a0, 1
47; LA64-NEXT:    sub.d $a0, $zero, $a0
48; LA64-NEXT:    ret
49  %1 = icmp eq i32 %a, %b
50  %2 = select i1 %1, i32 -1, i32 0
51  ret i32 %2
52}
53
54define signext i32 @select_ne_zero_negone(i32 signext %a, i32 signext %b) nounwind {
55; LA32-LABEL: select_ne_zero_negone:
56; LA32:       # %bb.0:
57; LA32-NEXT:    xor $a0, $a0, $a1
58; LA32-NEXT:    sltu $a0, $zero, $a0
59; LA32-NEXT:    sub.w $a0, $zero, $a0
60; LA32-NEXT:    ret
61;
62; LA64-LABEL: select_ne_zero_negone:
63; LA64:       # %bb.0:
64; LA64-NEXT:    xor $a0, $a0, $a1
65; LA64-NEXT:    sltu $a0, $zero, $a0
66; LA64-NEXT:    sub.d $a0, $zero, $a0
67; LA64-NEXT:    ret
68  %1 = icmp ne i32 %a, %b
69  %2 = select i1 %1, i32 -1, i32 0
70  ret i32 %2
71}
72
73define signext i32 @select_sgt_zero_negone(i32 signext %a, i32 signext %b) nounwind {
74; LA32-LABEL: select_sgt_zero_negone:
75; LA32:       # %bb.0:
76; LA32-NEXT:    slt $a0, $a1, $a0
77; LA32-NEXT:    sub.w $a0, $zero, $a0
78; LA32-NEXT:    ret
79;
80; LA64-LABEL: select_sgt_zero_negone:
81; LA64:       # %bb.0:
82; LA64-NEXT:    slt $a0, $a1, $a0
83; LA64-NEXT:    sub.d $a0, $zero, $a0
84; LA64-NEXT:    ret
85  %1 = icmp sgt i32 %a, %b
86  %2 = select i1 %1, i32 -1, i32 0
87  ret i32 %2
88}
89
90define signext i32 @select_slt_zero_negone(i32 signext %a, i32 signext %b) nounwind {
91; LA32-LABEL: select_slt_zero_negone:
92; LA32:       # %bb.0:
93; LA32-NEXT:    slt $a0, $a0, $a1
94; LA32-NEXT:    sub.w $a0, $zero, $a0
95; LA32-NEXT:    ret
96;
97; LA64-LABEL: select_slt_zero_negone:
98; LA64:       # %bb.0:
99; LA64-NEXT:    slt $a0, $a0, $a1
100; LA64-NEXT:    sub.d $a0, $zero, $a0
101; LA64-NEXT:    ret
102  %1 = icmp slt i32 %a, %b
103  %2 = select i1 %1, i32 -1, i32 0
104  ret i32 %2
105}
106
107define signext i32 @select_sge_zero_negone(i32 signext %a, i32 signext %b) nounwind {
108; LA32-LABEL: select_sge_zero_negone:
109; LA32:       # %bb.0:
110; LA32-NEXT:    slt $a0, $a0, $a1
111; LA32-NEXT:    xori $a0, $a0, 1
112; LA32-NEXT:    sub.w $a0, $zero, $a0
113; LA32-NEXT:    ret
114;
115; LA64-LABEL: select_sge_zero_negone:
116; LA64:       # %bb.0:
117; LA64-NEXT:    slt $a0, $a0, $a1
118; LA64-NEXT:    xori $a0, $a0, 1
119; LA64-NEXT:    sub.d $a0, $zero, $a0
120; LA64-NEXT:    ret
121  %1 = icmp sge i32 %a, %b
122  %2 = select i1 %1, i32 -1, i32 0
123  ret i32 %2
124}
125
126define signext i32 @select_sle_zero_negone(i32 signext %a, i32 signext %b) nounwind {
127; LA32-LABEL: select_sle_zero_negone:
128; LA32:       # %bb.0:
129; LA32-NEXT:    slt $a0, $a1, $a0
130; LA32-NEXT:    xori $a0, $a0, 1
131; LA32-NEXT:    sub.w $a0, $zero, $a0
132; LA32-NEXT:    ret
133;
134; LA64-LABEL: select_sle_zero_negone:
135; LA64:       # %bb.0:
136; LA64-NEXT:    slt $a0, $a1, $a0
137; LA64-NEXT:    xori $a0, $a0, 1
138; LA64-NEXT:    sub.d $a0, $zero, $a0
139; LA64-NEXT:    ret
140  %1 = icmp sle i32 %a, %b
141  %2 = select i1 %1, i32 -1, i32 0
142  ret i32 %2
143}
144
145define signext i32 @select_ugt_zero_negone(i32 signext %a, i32 signext %b) nounwind {
146; LA32-LABEL: select_ugt_zero_negone:
147; LA32:       # %bb.0:
148; LA32-NEXT:    sltu $a0, $a1, $a0
149; LA32-NEXT:    sub.w $a0, $zero, $a0
150; LA32-NEXT:    ret
151;
152; LA64-LABEL: select_ugt_zero_negone:
153; LA64:       # %bb.0:
154; LA64-NEXT:    sltu $a0, $a1, $a0
155; LA64-NEXT:    sub.d $a0, $zero, $a0
156; LA64-NEXT:    ret
157  %1 = icmp ugt i32 %a, %b
158  %2 = select i1 %1, i32 -1, i32 0
159  ret i32 %2
160}
161
162define signext i32 @select_ult_zero_negone(i32 signext %a, i32 signext %b) nounwind {
163; LA32-LABEL: select_ult_zero_negone:
164; LA32:       # %bb.0:
165; LA32-NEXT:    sltu $a0, $a0, $a1
166; LA32-NEXT:    sub.w $a0, $zero, $a0
167; LA32-NEXT:    ret
168;
169; LA64-LABEL: select_ult_zero_negone:
170; LA64:       # %bb.0:
171; LA64-NEXT:    sltu $a0, $a0, $a1
172; LA64-NEXT:    sub.d $a0, $zero, $a0
173; LA64-NEXT:    ret
174  %1 = icmp ult i32 %a, %b
175  %2 = select i1 %1, i32 -1, i32 0
176  ret i32 %2
177}
178
179define signext i32 @select_uge_zero_negone(i32 signext %a, i32 signext %b) nounwind {
180; LA32-LABEL: select_uge_zero_negone:
181; LA32:       # %bb.0:
182; LA32-NEXT:    sltu $a0, $a0, $a1
183; LA32-NEXT:    xori $a0, $a0, 1
184; LA32-NEXT:    sub.w $a0, $zero, $a0
185; LA32-NEXT:    ret
186;
187; LA64-LABEL: select_uge_zero_negone:
188; LA64:       # %bb.0:
189; LA64-NEXT:    sltu $a0, $a0, $a1
190; LA64-NEXT:    xori $a0, $a0, 1
191; LA64-NEXT:    sub.d $a0, $zero, $a0
192; LA64-NEXT:    ret
193  %1 = icmp uge i32 %a, %b
194  %2 = select i1 %1, i32 -1, i32 0
195  ret i32 %2
196}
197
198define signext i32 @select_ule_zero_negone(i32 signext %a, i32 signext %b) nounwind {
199; LA32-LABEL: select_ule_zero_negone:
200; LA32:       # %bb.0:
201; LA32-NEXT:    sltu $a0, $a1, $a0
202; LA32-NEXT:    xori $a0, $a0, 1
203; LA32-NEXT:    sub.w $a0, $zero, $a0
204; LA32-NEXT:    ret
205;
206; LA64-LABEL: select_ule_zero_negone:
207; LA64:       # %bb.0:
208; LA64-NEXT:    sltu $a0, $a1, $a0
209; LA64-NEXT:    xori $a0, $a0, 1
210; LA64-NEXT:    sub.d $a0, $zero, $a0
211; LA64-NEXT:    ret
212  %1 = icmp ule i32 %a, %b
213  %2 = select i1 %1, i32 -1, i32 0
214  ret i32 %2
215}
216
217define i32 @select_eq_1_2(i32 signext %a, i32 signext %b) {
218; LA32-LABEL: select_eq_1_2:
219; LA32:       # %bb.0:
220; LA32-NEXT:    xor $a0, $a0, $a1
221; LA32-NEXT:    sltui $a0, $a0, 1
222; LA32-NEXT:    ori $a1, $zero, 2
223; LA32-NEXT:    sub.w $a0, $a1, $a0
224; LA32-NEXT:    ret
225;
226; LA64-LABEL: select_eq_1_2:
227; LA64:       # %bb.0:
228; LA64-NEXT:    xor $a0, $a0, $a1
229; LA64-NEXT:    sltui $a0, $a0, 1
230; LA64-NEXT:    ori $a1, $zero, 2
231; LA64-NEXT:    sub.d $a0, $a1, $a0
232; LA64-NEXT:    ret
233  %1 = icmp eq i32 %a, %b
234  %2 = select i1 %1, i32 1, i32 2
235  ret i32 %2
236}
237
238define i32 @select_ne_1_2(i32 signext %a, i32 signext %b) {
239; LA32-LABEL: select_ne_1_2:
240; LA32:       # %bb.0:
241; LA32-NEXT:    xor $a0, $a0, $a1
242; LA32-NEXT:    sltu $a0, $zero, $a0
243; LA32-NEXT:    ori $a1, $zero, 2
244; LA32-NEXT:    sub.w $a0, $a1, $a0
245; LA32-NEXT:    ret
246;
247; LA64-LABEL: select_ne_1_2:
248; LA64:       # %bb.0:
249; LA64-NEXT:    xor $a0, $a0, $a1
250; LA64-NEXT:    sltu $a0, $zero, $a0
251; LA64-NEXT:    ori $a1, $zero, 2
252; LA64-NEXT:    sub.d $a0, $a1, $a0
253; LA64-NEXT:    ret
254  %1 = icmp ne i32 %a, %b
255  %2 = select i1 %1, i32 1, i32 2
256  ret i32 %2
257}
258
259define i32 @select_eq_10000_10001(i32 signext %a, i32 signext %b) {
260; LA32-LABEL: select_eq_10000_10001:
261; LA32:       # %bb.0:
262; LA32-NEXT:    xor $a0, $a0, $a1
263; LA32-NEXT:    sltui $a0, $a0, 1
264; LA32-NEXT:    lu12i.w $a1, 2
265; LA32-NEXT:    ori $a1, $a1, 1810
266; LA32-NEXT:    sub.w $a0, $a1, $a0
267; LA32-NEXT:    ret
268;
269; LA64-LABEL: select_eq_10000_10001:
270; LA64:       # %bb.0:
271; LA64-NEXT:    xor $a0, $a0, $a1
272; LA64-NEXT:    sltui $a0, $a0, 1
273; LA64-NEXT:    lu12i.w $a1, 2
274; LA64-NEXT:    ori $a1, $a1, 1810
275; LA64-NEXT:    sub.d $a0, $a1, $a0
276; LA64-NEXT:    ret
277  %1 = icmp eq i32 %a, %b
278  %2 = select i1 %1, i32 10001, i32 10002
279  ret i32 %2
280}
281
282define i32 @select_ne_10001_10002(i32 signext %a, i32 signext %b) {
283; LA32-LABEL: select_ne_10001_10002:
284; LA32:       # %bb.0:
285; LA32-NEXT:    xor $a0, $a0, $a1
286; LA32-NEXT:    sltu $a0, $zero, $a0
287; LA32-NEXT:    lu12i.w $a1, 2
288; LA32-NEXT:    ori $a1, $a1, 1810
289; LA32-NEXT:    sub.w $a0, $a1, $a0
290; LA32-NEXT:    ret
291;
292; LA64-LABEL: select_ne_10001_10002:
293; LA64:       # %bb.0:
294; LA64-NEXT:    xor $a0, $a0, $a1
295; LA64-NEXT:    sltu $a0, $zero, $a0
296; LA64-NEXT:    lu12i.w $a1, 2
297; LA64-NEXT:    ori $a1, $a1, 1810
298; LA64-NEXT:    sub.d $a0, $a1, $a0
299; LA64-NEXT:    ret
300  %1 = icmp ne i32 %a, %b
301  %2 = select i1 %1, i32 10001, i32 10002
302  ret i32 %2
303}
304