xref: /llvm-project/llvm/test/CodeGen/LoongArch/scmp.ll (revision e094abde42634e38cda85a6024792f681fc58f32) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s
3
4define i8 @scmp.8.8(i8 signext %x, i8 signext %y) nounwind {
5; CHECK-LABEL: scmp.8.8:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    slt $a2, $a0, $a1
8; CHECK-NEXT:    slt $a0, $a1, $a0
9; CHECK-NEXT:    sub.d $a0, $a0, $a2
10; CHECK-NEXT:    ret
11  %1 = call i8 @llvm.scmp(i8 %x, i8 %y)
12  ret i8 %1
13}
14
15define i8 @scmp.8.16(i16 signext %x, i16 signext %y) nounwind {
16; CHECK-LABEL: scmp.8.16:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    slt $a2, $a0, $a1
19; CHECK-NEXT:    slt $a0, $a1, $a0
20; CHECK-NEXT:    sub.d $a0, $a0, $a2
21; CHECK-NEXT:    ret
22  %1 = call i8 @llvm.scmp(i16 %x, i16 %y)
23  ret i8 %1
24}
25
26define i8 @scmp.8.32(i32 %x, i32 %y) nounwind {
27; CHECK-LABEL: scmp.8.32:
28; CHECK:       # %bb.0:
29; CHECK-NEXT:    addi.w $a1, $a1, 0
30; CHECK-NEXT:    addi.w $a0, $a0, 0
31; CHECK-NEXT:    slt $a2, $a0, $a1
32; CHECK-NEXT:    slt $a0, $a1, $a0
33; CHECK-NEXT:    sub.d $a0, $a0, $a2
34; CHECK-NEXT:    ret
35  %1 = call i8 @llvm.scmp(i32 %x, i32 %y)
36  ret i8 %1
37}
38
39define i8 @scmp.8.64(i64 %x, i64 %y) nounwind {
40; CHECK-LABEL: scmp.8.64:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    slt $a2, $a0, $a1
43; CHECK-NEXT:    slt $a0, $a1, $a0
44; CHECK-NEXT:    sub.d $a0, $a0, $a2
45; CHECK-NEXT:    ret
46  %1 = call i8 @llvm.scmp(i64 %x, i64 %y)
47  ret i8 %1
48}
49
50define i8 @scmp.8.128(i128 %x, i128 %y) nounwind {
51; CHECK-LABEL: scmp.8.128:
52; CHECK:       # %bb.0:
53; CHECK-NEXT:    slt $a4, $a1, $a3
54; CHECK-NEXT:    xor $a5, $a1, $a3
55; CHECK-NEXT:    sltui $a5, $a5, 1
56; CHECK-NEXT:    masknez $a4, $a4, $a5
57; CHECK-NEXT:    sltu $a6, $a0, $a2
58; CHECK-NEXT:    maskeqz $a6, $a6, $a5
59; CHECK-NEXT:    or $a4, $a6, $a4
60; CHECK-NEXT:    slt $a1, $a3, $a1
61; CHECK-NEXT:    masknez $a1, $a1, $a5
62; CHECK-NEXT:    sltu $a0, $a2, $a0
63; CHECK-NEXT:    maskeqz $a0, $a0, $a5
64; CHECK-NEXT:    or $a0, $a0, $a1
65; CHECK-NEXT:    sub.d $a0, $a0, $a4
66; CHECK-NEXT:    ret
67  %1 = call i8 @llvm.scmp(i128 %x, i128 %y)
68  ret i8 %1
69}
70
71define i32 @scmp.32.32(i32 %x, i32 %y) nounwind {
72; CHECK-LABEL: scmp.32.32:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    addi.w $a1, $a1, 0
75; CHECK-NEXT:    addi.w $a0, $a0, 0
76; CHECK-NEXT:    slt $a2, $a0, $a1
77; CHECK-NEXT:    slt $a0, $a1, $a0
78; CHECK-NEXT:    sub.d $a0, $a0, $a2
79; CHECK-NEXT:    ret
80  %1 = call i32 @llvm.scmp(i32 %x, i32 %y)
81  ret i32 %1
82}
83
84define i32 @scmp.32.64(i64 %x, i64 %y) nounwind {
85; CHECK-LABEL: scmp.32.64:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    slt $a2, $a0, $a1
88; CHECK-NEXT:    slt $a0, $a1, $a0
89; CHECK-NEXT:    sub.d $a0, $a0, $a2
90; CHECK-NEXT:    ret
91  %1 = call i32 @llvm.scmp(i64 %x, i64 %y)
92  ret i32 %1
93}
94
95define i64 @scmp.64.64(i64 %x, i64 %y) nounwind {
96; CHECK-LABEL: scmp.64.64:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    slt $a2, $a0, $a1
99; CHECK-NEXT:    slt $a0, $a1, $a0
100; CHECK-NEXT:    sub.d $a0, $a0, $a2
101; CHECK-NEXT:    ret
102  %1 = call i64 @llvm.scmp(i64 %x, i64 %y)
103  ret i64 %1
104}
105