1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s 3 4declare <16 x i8> @llvm.loongarch.lsx.vsubi.bu(<16 x i8>, i32) 5 6define <16 x i8> @lsx_vsubi_bu(<16 x i8> %va) nounwind { 7; CHECK-LABEL: lsx_vsubi_bu: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: vsubi.bu $vr0, $vr0, 31 10; CHECK-NEXT: ret 11entry: 12 %res = call <16 x i8> @llvm.loongarch.lsx.vsubi.bu(<16 x i8> %va, i32 31) 13 ret <16 x i8> %res 14} 15 16declare <8 x i16> @llvm.loongarch.lsx.vsubi.hu(<8 x i16>, i32) 17 18define <8 x i16> @lsx_vsubi_hu(<8 x i16> %va) nounwind { 19; CHECK-LABEL: lsx_vsubi_hu: 20; CHECK: # %bb.0: # %entry 21; CHECK-NEXT: vsubi.hu $vr0, $vr0, 31 22; CHECK-NEXT: ret 23entry: 24 %res = call <8 x i16> @llvm.loongarch.lsx.vsubi.hu(<8 x i16> %va, i32 31) 25 ret <8 x i16> %res 26} 27 28declare <4 x i32> @llvm.loongarch.lsx.vsubi.wu(<4 x i32>, i32) 29 30define <4 x i32> @lsx_vsubi_wu(<4 x i32> %va) nounwind { 31; CHECK-LABEL: lsx_vsubi_wu: 32; CHECK: # %bb.0: # %entry 33; CHECK-NEXT: vsubi.wu $vr0, $vr0, 31 34; CHECK-NEXT: ret 35entry: 36 %res = call <4 x i32> @llvm.loongarch.lsx.vsubi.wu(<4 x i32> %va, i32 31) 37 ret <4 x i32> %res 38} 39 40declare <2 x i64> @llvm.loongarch.lsx.vsubi.du(<2 x i64>, i32) 41 42define <2 x i64> @lsx_vsubi_du(<2 x i64> %va) nounwind { 43; CHECK-LABEL: lsx_vsubi_du: 44; CHECK: # %bb.0: # %entry 45; CHECK-NEXT: vsubi.du $vr0, $vr0, 31 46; CHECK-NEXT: ret 47entry: 48 %res = call <2 x i64> @llvm.loongarch.lsx.vsubi.du(<2 x i64> %va, i32 31) 49 ret <2 x i64> %res 50} 51