xref: /llvm-project/llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm.ll (revision ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
3
4declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, ptr, i32, i32)
5
6define void @lsx_vstelm_b(<16 x i8> %va, ptr %p) nounwind {
7; CHECK-LABEL: lsx_vstelm_b:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vstelm.b $vr0, $a0, 1, 15
10; CHECK-NEXT:    ret
11entry:
12  call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 1, i32 15)
13  ret void
14}
15
16declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, ptr, i32, i32)
17
18define void @lsx_vstelm_h(<8 x i16> %va, ptr %p) nounwind {
19; CHECK-LABEL: lsx_vstelm_h:
20; CHECK:       # %bb.0: # %entry
21; CHECK-NEXT:    vstelm.h $vr0, $a0, 2, 7
22; CHECK-NEXT:    ret
23entry:
24  call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 2, i32 7)
25  ret void
26}
27
28declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, ptr, i32, i32)
29
30define void @lsx_vstelm_w(<4 x i32> %va, ptr %p) nounwind {
31; CHECK-LABEL: lsx_vstelm_w:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    vstelm.w $vr0, $a0, 4, 3
34; CHECK-NEXT:    ret
35entry:
36  call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 4, i32 3)
37  ret void
38}
39
40declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, ptr, i32, i32)
41
42define void @lsx_vstelm_d(<2 x i64> %va, ptr %p) nounwind {
43; CHECK-LABEL: lsx_vstelm_d:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    vstelm.d $vr0, $a0, 8, 1
46; CHECK-NEXT:    ret
47entry:
48  call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 8, i32 1)
49  ret void
50}
51