xref: /llvm-project/llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr.ll (revision f3aa4416319aed198841401c6c9dc2e49afe2507) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
3
4declare i32 @llvm.loongarch.lsx.vpickve2gr.b(<16 x i8>, i32)
5
6define i32 @lsx_vpickve2gr_b(<16 x i8> %va) nounwind {
7; CHECK-LABEL: lsx_vpickve2gr_b:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 15
10; CHECK-NEXT:    ret
11entry:
12  %res = call i32 @llvm.loongarch.lsx.vpickve2gr.b(<16 x i8> %va, i32 15)
13  ret i32 %res
14}
15
16declare i32 @llvm.loongarch.lsx.vpickve2gr.h(<8 x i16>, i32)
17
18define i32 @lsx_vpickve2gr_h(<8 x i16> %va) nounwind {
19; CHECK-LABEL: lsx_vpickve2gr_h:
20; CHECK:       # %bb.0: # %entry
21; CHECK-NEXT:    vpickve2gr.h $a0, $vr0, 7
22; CHECK-NEXT:    ret
23entry:
24  %res = call i32 @llvm.loongarch.lsx.vpickve2gr.h(<8 x i16> %va, i32 7)
25  ret i32 %res
26}
27
28declare i32 @llvm.loongarch.lsx.vpickve2gr.w(<4 x i32>, i32)
29
30define i32 @lsx_vpickve2gr_w(<4 x i32> %va) nounwind {
31; CHECK-LABEL: lsx_vpickve2gr_w:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    vpickve2gr.w $a0, $vr0, 3
34; CHECK-NEXT:    ret
35entry:
36  %res = call i32 @llvm.loongarch.lsx.vpickve2gr.w(<4 x i32> %va, i32 3)
37  ret i32 %res
38}
39
40declare i64 @llvm.loongarch.lsx.vpickve2gr.d(<2 x i64>, i32)
41
42define i64 @lsx_vpickve2gr_d(<2 x i64> %va) nounwind {
43; CHECK-LABEL: lsx_vpickve2gr_d:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    vpickve2gr.d $a0, $vr0, 1
46; CHECK-NEXT:    ret
47entry:
48  %res = call i64 @llvm.loongarch.lsx.vpickve2gr.d(<2 x i64> %va, i32 1)
49  ret i64 %res
50}
51
52declare i32 @llvm.loongarch.lsx.vpickve2gr.bu(<16 x i8>, i32)
53
54define i32 @lsx_vpickve2gr_bu(<16 x i8> %va) nounwind {
55; CHECK-LABEL: lsx_vpickve2gr_bu:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    vpickve2gr.bu $a0, $vr0, 15
58; CHECK-NEXT:    ret
59entry:
60  %res = call i32 @llvm.loongarch.lsx.vpickve2gr.bu(<16 x i8> %va, i32 15)
61  ret i32 %res
62}
63
64declare i32 @llvm.loongarch.lsx.vpickve2gr.hu(<8 x i16>, i32)
65
66define i32 @lsx_vpickve2gr_hu(<8 x i16> %va) nounwind {
67; CHECK-LABEL: lsx_vpickve2gr_hu:
68; CHECK:       # %bb.0: # %entry
69; CHECK-NEXT:    vpickve2gr.hu $a0, $vr0, 7
70; CHECK-NEXT:    ret
71entry:
72  %res = call i32 @llvm.loongarch.lsx.vpickve2gr.hu(<8 x i16> %va, i32 7)
73  ret i32 %res
74}
75
76declare i32 @llvm.loongarch.lsx.vpickve2gr.wu(<4 x i32>, i32)
77
78define i32 @lsx_vpickve2gr_wu(<4 x i32> %va) nounwind {
79; CHECK-LABEL: lsx_vpickve2gr_wu:
80; CHECK:       # %bb.0: # %entry
81; CHECK-NEXT:    vpickve2gr.wu $a0, $vr0, 3
82; CHECK-NEXT:    ret
83entry:
84  %res = call i32 @llvm.loongarch.lsx.vpickve2gr.wu(<4 x i32> %va, i32 3)
85  ret i32 %res
86}
87
88declare i64 @llvm.loongarch.lsx.vpickve2gr.du(<2 x i64>, i32)
89
90define i64 @lsx_vpickve2gr_du(<2 x i64> %va) nounwind {
91; CHECK-LABEL: lsx_vpickve2gr_du:
92; CHECK:       # %bb.0: # %entry
93; CHECK-NEXT:    vpickve2gr.du $a0, $vr0, 1
94; CHECK-NEXT:    ret
95entry:
96  %res = call i64 @llvm.loongarch.lsx.vpickve2gr.du(<2 x i64> %va, i32 1)
97  ret i64 %res
98}
99