1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s 3 4declare <16 x i8> @llvm.loongarch.lsx.vinsgr2vr.b(<16 x i8>, i32, i32) 5 6define <16 x i8> @lsx_vinsgr2vr_b(<16 x i8> %va) nounwind { 7; CHECK-LABEL: lsx_vinsgr2vr_b: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: ori $a0, $zero, 1 10; CHECK-NEXT: vinsgr2vr.b $vr0, $a0, 15 11; CHECK-NEXT: ret 12entry: 13 %res = call <16 x i8> @llvm.loongarch.lsx.vinsgr2vr.b(<16 x i8> %va, i32 1, i32 15) 14 ret <16 x i8> %res 15} 16 17declare <8 x i16> @llvm.loongarch.lsx.vinsgr2vr.h(<8 x i16>, i32, i32) 18 19define <8 x i16> @lsx_vinsgr2vr_h(<8 x i16> %va) nounwind { 20; CHECK-LABEL: lsx_vinsgr2vr_h: 21; CHECK: # %bb.0: # %entry 22; CHECK-NEXT: ori $a0, $zero, 1 23; CHECK-NEXT: vinsgr2vr.h $vr0, $a0, 7 24; CHECK-NEXT: ret 25entry: 26 %res = call <8 x i16> @llvm.loongarch.lsx.vinsgr2vr.h(<8 x i16> %va, i32 1, i32 7) 27 ret <8 x i16> %res 28} 29 30declare <4 x i32> @llvm.loongarch.lsx.vinsgr2vr.w(<4 x i32>, i32, i32) 31 32define <4 x i32> @lsx_vinsgr2vr_w(<4 x i32> %va) nounwind { 33; CHECK-LABEL: lsx_vinsgr2vr_w: 34; CHECK: # %bb.0: # %entry 35; CHECK-NEXT: ori $a0, $zero, 1 36; CHECK-NEXT: vinsgr2vr.w $vr0, $a0, 3 37; CHECK-NEXT: ret 38entry: 39 %res = call <4 x i32> @llvm.loongarch.lsx.vinsgr2vr.w(<4 x i32> %va, i32 1, i32 3) 40 ret <4 x i32> %res 41} 42 43declare <2 x i64> @llvm.loongarch.lsx.vinsgr2vr.d(<2 x i64>, i64, i32) 44 45define <2 x i64> @lsx_vinsgr2vr_d(<2 x i64> %va) nounwind { 46; CHECK-LABEL: lsx_vinsgr2vr_d: 47; CHECK: # %bb.0: # %entry 48; CHECK-NEXT: ori $a0, $zero, 1 49; CHECK-NEXT: vinsgr2vr.d $vr0, $a0, 1 50; CHECK-NEXT: ret 51entry: 52 %res = call <2 x i64> @llvm.loongarch.lsx.vinsgr2vr.d(<2 x i64> %va, i64 1, i32 1) 53 ret <2 x i64> %res 54} 55