xref: /llvm-project/llvm/test/CodeGen/LoongArch/lsx/intrinsic-ftint.ll (revision f3aa4416319aed198841401c6c9dc2e49afe2507)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
3
4declare <4 x i32> @llvm.loongarch.lsx.vftintrne.w.s(<4 x float>)
5
6define <4 x i32> @lsx_vftintrne_w_s(<4 x float> %va) nounwind {
7; CHECK-LABEL: lsx_vftintrne_w_s:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vftintrne.w.s $vr0, $vr0
10; CHECK-NEXT:    ret
11entry:
12  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrne.w.s(<4 x float> %va)
13  ret <4 x i32> %res
14}
15
16declare <2 x i64> @llvm.loongarch.lsx.vftintrne.l.d(<2 x double>)
17
18define <2 x i64> @lsx_vftintrne_l_d(<2 x double> %va) nounwind {
19; CHECK-LABEL: lsx_vftintrne_l_d:
20; CHECK:       # %bb.0: # %entry
21; CHECK-NEXT:    vftintrne.l.d $vr0, $vr0
22; CHECK-NEXT:    ret
23entry:
24  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrne.l.d(<2 x double> %va)
25  ret <2 x i64> %res
26}
27
28declare <4 x i32> @llvm.loongarch.lsx.vftintrz.w.s(<4 x float>)
29
30define <4 x i32> @lsx_vftintrz_w_s(<4 x float> %va) nounwind {
31; CHECK-LABEL: lsx_vftintrz_w_s:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    vftintrz.w.s $vr0, $vr0
34; CHECK-NEXT:    ret
35entry:
36  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrz.w.s(<4 x float> %va)
37  ret <4 x i32> %res
38}
39
40declare <2 x i64> @llvm.loongarch.lsx.vftintrz.l.d(<2 x double>)
41
42define <2 x i64> @lsx_vftintrz_l_d(<2 x double> %va) nounwind {
43; CHECK-LABEL: lsx_vftintrz_l_d:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    vftintrz.l.d $vr0, $vr0
46; CHECK-NEXT:    ret
47entry:
48  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrz.l.d(<2 x double> %va)
49  ret <2 x i64> %res
50}
51
52declare <4 x i32> @llvm.loongarch.lsx.vftintrp.w.s(<4 x float>)
53
54define <4 x i32> @lsx_vftintrp_w_s(<4 x float> %va) nounwind {
55; CHECK-LABEL: lsx_vftintrp_w_s:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    vftintrp.w.s $vr0, $vr0
58; CHECK-NEXT:    ret
59entry:
60  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrp.w.s(<4 x float> %va)
61  ret <4 x i32> %res
62}
63
64declare <2 x i64> @llvm.loongarch.lsx.vftintrp.l.d(<2 x double>)
65
66define <2 x i64> @lsx_vftintrp_l_d(<2 x double> %va) nounwind {
67; CHECK-LABEL: lsx_vftintrp_l_d:
68; CHECK:       # %bb.0: # %entry
69; CHECK-NEXT:    vftintrp.l.d $vr0, $vr0
70; CHECK-NEXT:    ret
71entry:
72  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrp.l.d(<2 x double> %va)
73  ret <2 x i64> %res
74}
75
76declare <4 x i32> @llvm.loongarch.lsx.vftintrm.w.s(<4 x float>)
77
78define <4 x i32> @lsx_vftintrm_w_s(<4 x float> %va) nounwind {
79; CHECK-LABEL: lsx_vftintrm_w_s:
80; CHECK:       # %bb.0: # %entry
81; CHECK-NEXT:    vftintrm.w.s $vr0, $vr0
82; CHECK-NEXT:    ret
83entry:
84  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrm.w.s(<4 x float> %va)
85  ret <4 x i32> %res
86}
87
88declare <2 x i64> @llvm.loongarch.lsx.vftintrm.l.d(<2 x double>)
89
90define <2 x i64> @lsx_vftintrm_l_d(<2 x double> %va) nounwind {
91; CHECK-LABEL: lsx_vftintrm_l_d:
92; CHECK:       # %bb.0: # %entry
93; CHECK-NEXT:    vftintrm.l.d $vr0, $vr0
94; CHECK-NEXT:    ret
95entry:
96  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrm.l.d(<2 x double> %va)
97  ret <2 x i64> %res
98}
99
100declare <4 x i32> @llvm.loongarch.lsx.vftint.w.s(<4 x float>)
101
102define <4 x i32> @lsx_vftint_w_s(<4 x float> %va) nounwind {
103; CHECK-LABEL: lsx_vftint_w_s:
104; CHECK:       # %bb.0: # %entry
105; CHECK-NEXT:    vftint.w.s $vr0, $vr0
106; CHECK-NEXT:    ret
107entry:
108  %res = call <4 x i32> @llvm.loongarch.lsx.vftint.w.s(<4 x float> %va)
109  ret <4 x i32> %res
110}
111
112declare <2 x i64> @llvm.loongarch.lsx.vftint.l.d(<2 x double>)
113
114define <2 x i64> @lsx_vftint_l_d(<2 x double> %va) nounwind {
115; CHECK-LABEL: lsx_vftint_l_d:
116; CHECK:       # %bb.0: # %entry
117; CHECK-NEXT:    vftint.l.d $vr0, $vr0
118; CHECK-NEXT:    ret
119entry:
120  %res = call <2 x i64> @llvm.loongarch.lsx.vftint.l.d(<2 x double> %va)
121  ret <2 x i64> %res
122}
123
124declare <4 x i32> @llvm.loongarch.lsx.vftintrz.wu.s(<4 x float>)
125
126define <4 x i32> @lsx_vftintrz_wu_s(<4 x float> %va) nounwind {
127; CHECK-LABEL: lsx_vftintrz_wu_s:
128; CHECK:       # %bb.0: # %entry
129; CHECK-NEXT:    vftintrz.wu.s $vr0, $vr0
130; CHECK-NEXT:    ret
131entry:
132  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrz.wu.s(<4 x float> %va)
133  ret <4 x i32> %res
134}
135
136declare <2 x i64> @llvm.loongarch.lsx.vftintrz.lu.d(<2 x double>)
137
138define <2 x i64> @lsx_vftintrz_lu_d(<2 x double> %va) nounwind {
139; CHECK-LABEL: lsx_vftintrz_lu_d:
140; CHECK:       # %bb.0: # %entry
141; CHECK-NEXT:    vftintrz.lu.d $vr0, $vr0
142; CHECK-NEXT:    ret
143entry:
144  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrz.lu.d(<2 x double> %va)
145  ret <2 x i64> %res
146}
147
148declare <4 x i32> @llvm.loongarch.lsx.vftint.wu.s(<4 x float>)
149
150define <4 x i32> @lsx_vftint_wu_s(<4 x float> %va) nounwind {
151; CHECK-LABEL: lsx_vftint_wu_s:
152; CHECK:       # %bb.0: # %entry
153; CHECK-NEXT:    vftint.wu.s $vr0, $vr0
154; CHECK-NEXT:    ret
155entry:
156  %res = call <4 x i32> @llvm.loongarch.lsx.vftint.wu.s(<4 x float> %va)
157  ret <4 x i32> %res
158}
159
160declare <2 x i64> @llvm.loongarch.lsx.vftint.lu.d(<2 x double>)
161
162define <2 x i64> @lsx_vftint_lu_d(<2 x double> %va) nounwind {
163; CHECK-LABEL: lsx_vftint_lu_d:
164; CHECK:       # %bb.0: # %entry
165; CHECK-NEXT:    vftint.lu.d $vr0, $vr0
166; CHECK-NEXT:    ret
167entry:
168  %res = call <2 x i64> @llvm.loongarch.lsx.vftint.lu.d(<2 x double> %va)
169  ret <2 x i64> %res
170}
171
172declare <4 x i32> @llvm.loongarch.lsx.vftintrne.w.d(<2 x double>, <2 x double>)
173
174define <4 x i32> @lsx_vftintrne_w_d(<2 x double> %va, <2 x double> %vb) nounwind {
175; CHECK-LABEL: lsx_vftintrne_w_d:
176; CHECK:       # %bb.0: # %entry
177; CHECK-NEXT:    vftintrne.w.d $vr0, $vr0, $vr1
178; CHECK-NEXT:    ret
179entry:
180  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrne.w.d(<2 x double> %va, <2 x double> %vb)
181  ret <4 x i32> %res
182}
183
184declare <4 x i32> @llvm.loongarch.lsx.vftintrz.w.d(<2 x double>, <2 x double>)
185
186define <4 x i32> @lsx_vftintrz_w_d(<2 x double> %va, <2 x double> %vb) nounwind {
187; CHECK-LABEL: lsx_vftintrz_w_d:
188; CHECK:       # %bb.0: # %entry
189; CHECK-NEXT:    vftintrz.w.d $vr0, $vr0, $vr1
190; CHECK-NEXT:    ret
191entry:
192  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrz.w.d(<2 x double> %va, <2 x double> %vb)
193  ret <4 x i32> %res
194}
195
196declare <4 x i32> @llvm.loongarch.lsx.vftintrp.w.d(<2 x double>, <2 x double>)
197
198define <4 x i32> @lsx_vftintrp_w_d(<2 x double> %va, <2 x double> %vb) nounwind {
199; CHECK-LABEL: lsx_vftintrp_w_d:
200; CHECK:       # %bb.0: # %entry
201; CHECK-NEXT:    vftintrp.w.d $vr0, $vr0, $vr1
202; CHECK-NEXT:    ret
203entry:
204  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrp.w.d(<2 x double> %va, <2 x double> %vb)
205  ret <4 x i32> %res
206}
207
208declare <4 x i32> @llvm.loongarch.lsx.vftintrm.w.d(<2 x double>, <2 x double>)
209
210define <4 x i32> @lsx_vftintrm_w_d(<2 x double> %va, <2 x double> %vb) nounwind {
211; CHECK-LABEL: lsx_vftintrm_w_d:
212; CHECK:       # %bb.0: # %entry
213; CHECK-NEXT:    vftintrm.w.d $vr0, $vr0, $vr1
214; CHECK-NEXT:    ret
215entry:
216  %res = call <4 x i32> @llvm.loongarch.lsx.vftintrm.w.d(<2 x double> %va, <2 x double> %vb)
217  ret <4 x i32> %res
218}
219
220declare <4 x i32> @llvm.loongarch.lsx.vftint.w.d(<2 x double>, <2 x double>)
221
222define <4 x i32> @lsx_vftint_w_d(<2 x double> %va, <2 x double> %vb) nounwind {
223; CHECK-LABEL: lsx_vftint_w_d:
224; CHECK:       # %bb.0: # %entry
225; CHECK-NEXT:    vftint.w.d $vr0, $vr0, $vr1
226; CHECK-NEXT:    ret
227entry:
228  %res = call <4 x i32> @llvm.loongarch.lsx.vftint.w.d(<2 x double> %va, <2 x double> %vb)
229  ret <4 x i32> %res
230}
231
232declare <2 x i64> @llvm.loongarch.lsx.vftintrnel.l.s(<4 x float>)
233
234define <2 x i64> @lsx_vftintrnel_l_s(<4 x float> %va) nounwind {
235; CHECK-LABEL: lsx_vftintrnel_l_s:
236; CHECK:       # %bb.0: # %entry
237; CHECK-NEXT:    vftintrnel.l.s $vr0, $vr0
238; CHECK-NEXT:    ret
239entry:
240  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrnel.l.s(<4 x float> %va)
241  ret <2 x i64> %res
242}
243
244declare <2 x i64> @llvm.loongarch.lsx.vftintrneh.l.s(<4 x float>)
245
246define <2 x i64> @lsx_vftintrneh_l_s(<4 x float> %va) nounwind {
247; CHECK-LABEL: lsx_vftintrneh_l_s:
248; CHECK:       # %bb.0: # %entry
249; CHECK-NEXT:    vftintrneh.l.s $vr0, $vr0
250; CHECK-NEXT:    ret
251entry:
252  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrneh.l.s(<4 x float> %va)
253  ret <2 x i64> %res
254}
255
256declare <2 x i64> @llvm.loongarch.lsx.vftintrzl.l.s(<4 x float>)
257
258define <2 x i64> @lsx_vftintrzl_l_s(<4 x float> %va) nounwind {
259; CHECK-LABEL: lsx_vftintrzl_l_s:
260; CHECK:       # %bb.0: # %entry
261; CHECK-NEXT:    vftintrzl.l.s $vr0, $vr0
262; CHECK-NEXT:    ret
263entry:
264  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrzl.l.s(<4 x float> %va)
265  ret <2 x i64> %res
266}
267
268declare <2 x i64> @llvm.loongarch.lsx.vftintrzh.l.s(<4 x float>)
269
270define <2 x i64> @lsx_vftintrzh_l_s(<4 x float> %va) nounwind {
271; CHECK-LABEL: lsx_vftintrzh_l_s:
272; CHECK:       # %bb.0: # %entry
273; CHECK-NEXT:    vftintrzh.l.s $vr0, $vr0
274; CHECK-NEXT:    ret
275entry:
276  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrzh.l.s(<4 x float> %va)
277  ret <2 x i64> %res
278}
279
280declare <2 x i64> @llvm.loongarch.lsx.vftintrpl.l.s(<4 x float>)
281
282define <2 x i64> @lsx_vftintrpl_l_s(<4 x float> %va) nounwind {
283; CHECK-LABEL: lsx_vftintrpl_l_s:
284; CHECK:       # %bb.0: # %entry
285; CHECK-NEXT:    vftintrpl.l.s $vr0, $vr0
286; CHECK-NEXT:    ret
287entry:
288  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrpl.l.s(<4 x float> %va)
289  ret <2 x i64> %res
290}
291
292declare <2 x i64> @llvm.loongarch.lsx.vftintrph.l.s(<4 x float>)
293
294define <2 x i64> @lsx_vftintrph_l_s(<4 x float> %va) nounwind {
295; CHECK-LABEL: lsx_vftintrph_l_s:
296; CHECK:       # %bb.0: # %entry
297; CHECK-NEXT:    vftintrph.l.s $vr0, $vr0
298; CHECK-NEXT:    ret
299entry:
300  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrph.l.s(<4 x float> %va)
301  ret <2 x i64> %res
302}
303
304declare <2 x i64> @llvm.loongarch.lsx.vftintrml.l.s(<4 x float>)
305
306define <2 x i64> @lsx_vftintrml_l_s(<4 x float> %va) nounwind {
307; CHECK-LABEL: lsx_vftintrml_l_s:
308; CHECK:       # %bb.0: # %entry
309; CHECK-NEXT:    vftintrml.l.s $vr0, $vr0
310; CHECK-NEXT:    ret
311entry:
312  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrml.l.s(<4 x float> %va)
313  ret <2 x i64> %res
314}
315
316declare <2 x i64> @llvm.loongarch.lsx.vftintrmh.l.s(<4 x float>)
317
318define <2 x i64> @lsx_vftintrmh_l_s(<4 x float> %va) nounwind {
319; CHECK-LABEL: lsx_vftintrmh_l_s:
320; CHECK:       # %bb.0: # %entry
321; CHECK-NEXT:    vftintrmh.l.s $vr0, $vr0
322; CHECK-NEXT:    ret
323entry:
324  %res = call <2 x i64> @llvm.loongarch.lsx.vftintrmh.l.s(<4 x float> %va)
325  ret <2 x i64> %res
326}
327
328declare <2 x i64> @llvm.loongarch.lsx.vftintl.l.s(<4 x float>)
329
330define <2 x i64> @lsx_vftintl_l_s(<4 x float> %va) nounwind {
331; CHECK-LABEL: lsx_vftintl_l_s:
332; CHECK:       # %bb.0: # %entry
333; CHECK-NEXT:    vftintl.l.s $vr0, $vr0
334; CHECK-NEXT:    ret
335entry:
336  %res = call <2 x i64> @llvm.loongarch.lsx.vftintl.l.s(<4 x float> %va)
337  ret <2 x i64> %res
338}
339
340declare <2 x i64> @llvm.loongarch.lsx.vftinth.l.s(<4 x float>)
341
342define <2 x i64> @lsx_vftinth_l_s(<4 x float> %va) nounwind {
343; CHECK-LABEL: lsx_vftinth_l_s:
344; CHECK:       # %bb.0: # %entry
345; CHECK-NEXT:    vftinth.l.s $vr0, $vr0
346; CHECK-NEXT:    ret
347entry:
348  %res = call <2 x i64> @llvm.loongarch.lsx.vftinth.l.s(<4 x float> %va)
349  ret <2 x i64> %res
350}
351