xref: /llvm-project/llvm/test/CodeGen/LoongArch/lasx/intrinsic-permi.ll (revision e4edbae0aa6a9739954ee3b494b18f8c599d9d79)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3
4declare <8 x i32> @llvm.loongarch.lasx.xvpermi.w(<8 x i32>, <8 x i32>, i32)
5
6define <8 x i32> @lasx_xvpermi_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
7; CHECK-LABEL: lasx_xvpermi_w:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    xvpermi.w $xr0, $xr1, 1
10; CHECK-NEXT:    ret
11entry:
12  %res = call <8 x i32> @llvm.loongarch.lasx.xvpermi.w(<8 x i32> %va, <8 x i32> %vb, i32 1)
13  ret <8 x i32> %res
14}
15
16declare <4 x i64> @llvm.loongarch.lasx.xvpermi.d(<4 x i64>, i32)
17
18define <4 x i64> @lasx_xvpermi_d(<4 x i64> %va) nounwind {
19; CHECK-LABEL: lasx_xvpermi_d:
20; CHECK:       # %bb.0: # %entry
21; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 1
22; CHECK-NEXT:    ret
23entry:
24  %res = call <4 x i64> @llvm.loongarch.lasx.xvpermi.d(<4 x i64> %va, i32 1)
25  ret <4 x i64> %res
26}
27
28declare <32 x i8> @llvm.loongarch.lasx.xvpermi.q(<32 x i8>, <32 x i8>, i32)
29
30define <32 x i8> @lasx_xvpermi_q(<32 x i8> %va, <32 x i8> %vb) nounwind {
31; CHECK-LABEL: lasx_xvpermi_q:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 1
34; CHECK-NEXT:    ret
35entry:
36  %res = call <32 x i8> @llvm.loongarch.lasx.xvpermi.q(<32 x i8> %va, <32 x i8> %vb, i32 1)
37  ret <32 x i8> %res
38}
39