1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s 3 4declare <8 x i32> @llvm.loongarch.lasx.xvinsve0.w(<8 x i32>, <8 x i32>, i32) 5 6define <8 x i32> @lasx_xvinsve0_w(<8 x i32> %va, <8 x i32> %vb) nounwind { 7; CHECK-LABEL: lasx_xvinsve0_w: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: xvinsve0.w $xr0, $xr1, 1 10; CHECK-NEXT: ret 11entry: 12 %res = call <8 x i32> @llvm.loongarch.lasx.xvinsve0.w(<8 x i32> %va, <8 x i32> %vb, i32 1) 13 ret <8 x i32> %res 14} 15 16declare <4 x i64> @llvm.loongarch.lasx.xvinsve0.d(<4 x i64>, <4 x i64>, i32) 17 18define <4 x i64> @lasx_xvinsve0_d(<4 x i64> %va, <4 x i64> %vb) nounwind { 19; CHECK-LABEL: lasx_xvinsve0_d: 20; CHECK: # %bb.0: # %entry 21; CHECK-NEXT: xvinsve0.d $xr0, $xr1, 1 22; CHECK-NEXT: ret 23entry: 24 %res = call <4 x i64> @llvm.loongarch.lasx.xvinsve0.d(<4 x i64> %va, <4 x i64> %vb, i32 1) 25 ret <4 x i64> %res 26} 27